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公开(公告)号：KR101363791B1
公开(公告)日：2014-02-20
申请号：KR1020120138741
申请日：2012-12-03
Applicant: 고려대학교 산학협력단
CPC classification number: C12M41/46 , G01J1/0295 , G01N33/48735
Abstract: 본 발명은 세포의 그림자 이미지를 이용하여 세포의 활성도를 연속적이며, 고 처리량으로 측정하여 세포 활성도 및 세포 계수 결과를 제공하는 장치에 관한 것이다.
본 발명의 일실시예에 의하면, 현미경이나 ELISA Reader 등을 이용하여 숙련된 검사자 혹은 기술자만이 할 수 있던 각종 세포 활성도 측정 및 계수를 저가, 소형의 광전자 부품 등을 이용한 하드웨어 및 간단한 이미지 프로세싱 기법과 결합한 컴퓨터 소프트웨어의 개발로 자동화 할 수 있어 비용이 감소하고 측정의 오차도 크게 줄일 수 있다.-
公开(公告)号：KR1020130111185A
公开(公告)日：2013-10-10
申请号：KR1020120138741
申请日：2012-12-03
Applicant: 고려대학교 산학협력단
CPC classification number: C12M41/46 , G01J1/0295 , G01N33/48735 , C12M29/00 , C12M41/12 , C12Q1/02
Abstract: PURPOSE: An apparatus for measuring cell viability and a method for analyzing cell viability are provided to automatize measurement of viability of various cells by an image processing method and hardware using a cheap and small photoelectron component and by developing computer software, thereby saving costs and reducing errors. CONSTITUTION: An apparatus (100) for measuring cell viability comprises: a fluidic channel (130) for injection of a culture medium and cells; a light emitting device (110) which is placed at the upper portion of the fluidic channel and emits light in a fluidic channel direction; and an image sensor (140) which is placed at the lower portion of the fluidic channel and photographs a shadow image of the cells. A method for analyzing cell viability comprises the steps of: receiving the photographed shadow image from the image sensor; acquiring specific parameter from the received shadow image; and displaying the state of cell viability using the acquired parameter. [Reference numerals] (160) Analysis module
Abstract translation: 目的：提供一种用于测量细胞活力的装置和分析细胞活力的方法，通过使用廉价和小型光电子部件的图像处理方法和硬件自动测量各种细胞的存活力，并通过开发计算机软件，从而节省成本并减少 错误。 构成：用于测量细胞活力的装置（100）包括：用于注射培养基和细胞的流体通道（130）; 发光装置（110），其放置在流体通道的上部并发射流体通道方向的光; 以及放置在流体通道的下部并拍摄单元的阴影图像的图像传感器（140）。 一种用于分析细胞活力的方法包括以下步骤：从图像传感器接收所拍摄的阴影图像; 从接收的阴影图像获取特定参数; 并使用所获取的参数显示细胞活力的状态。 （附图标记）（160）分析模块
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公开(公告)号：KR101281152B1
公开(公告)日：2013-07-02
申请号：KR1020120032445
申请日：2012-03-29
Applicant: 고려대학교 산학협력단
Inventor： 양지운
IPC: H01L21/336 , H01L29/78
CPC classification number: H01L29/66795 , H01L29/785
Abstract: PURPOSE: A method for fabricating a multi-gate MOSFET is provided to increase a driving current by markedly reducing the concentration of impurity in a channel and to increase the operation speed of an integrated circuit. CONSTITUTION: An insulating layer (120) is formed on a bulk silicon substrate (110). An insulating layer is patterned to have a preset pattern. The lower region of a channel is formed in a position for exposing the surface of the bulk silicon substrate. Impurity ions are injected into the insulating layer. Silicon is grown on the lower part of the channel region to form the channel region (110b). The insulating layer is etched to form a pin type channel region.
Abstract translation: 目的：提供一种制造多栅极MOSFET的方法，通过显着降低通道中的杂质浓度并增加集成电路的工作速度来增加驱动电流。 构成：在体硅衬底（110）上形成绝缘层（120）。 将绝缘层图案化成具有预设图案。 通道的下部区域形成在暴露体硅衬底的表面的位置。 杂质离子注入绝缘层。 硅在沟道区的下部生长以形成沟道区（110b）。 蚀刻绝缘层以形成引脚型沟道区。
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