公开(公告)号：KR101266041B1

公开(公告)日：2013-05-21

申请号：KR1020120055208

申请日：2012-05-24

Applicant: 국방과학연구소

Inventor： 이동호 ,  김현실 ,  이종명 ,  팜홍안 ,  김세목

IPC: H04L29/04 ,  H04L12/24 ,  H04L12/28

CPC classification number: H04L41/0668 ,  H04L49/109 ,  H04L49/30 ,  H04L49/351

Abstract: PURPOSE: An automatic high-speed failure recovery Ethernet multiplexing network system using a logic gate based switching chip is provided to select a port without additional device such as a processor or middleware. CONSTITUTION: A high-speed automatic failure recovery Ethernet multiplexing network system includes a port unit(100), a PHY chip unit(200), a MAC chip(300) and a switching unit(400). The port unit is connected to the outside. The PHY chip unit communicates a signal inputted and outputted through the port unit with a MII/GMII(Media Independent Interface/Gigabit Media Independent Interface) protocol. The MAC chip has a MAC address. The switching unit converts a port by switching a MMI/GMII signal. In case of failure in a port in an operation mode, the switching unit operates the port in a standby mode to an operating mode. A first MII/GMII signal inputted from a first port of the port unit and a second MII/GMII signal inputted from a second port are connected to a MII/GMII signal connected to the MAC chip. [Reference numerals] (210) First PHY chip(PHY 0); (220) Second PHY chip(PHY 1); (300) MAC chip; (400) Switching unit, MII/GMII switching; (AA,BB) Magnetic

Abstract translation: 目的：提供使用基于逻辑门的交换芯片的自动高速故障恢复以太网复用网络系统，以选择不需要附加设备（如处理器或中间件）的端口。 构成：高速自动故障恢复以太网复用网络系统包括端口单元（100），PHY芯片单元（200），MAC芯片（300）和交换单元（400）。 端口单元连接到外部。 PHY芯片单元通过MII / GMII（媒体独立接口/千兆位媒体独立接口）协议传送通过端口单元输入和输出的信号。 MAC芯片具有MAC地址。 切换单元通过切换MMI / GMII信号来转换端口。 在操作模式下端口出现故障的情况下，切换单元将待机模式下的端口操作为运行模式。 从端口单元的第一端口输入的第一MII / GMII信号和从第二端口输入的第二MII / GMII信号连接到连接到MAC芯片的MII / GMII信号。 （附图标记）（210）第一PHY芯片（PHY 0）; （220）第二PHY芯片（PHY 1）; （300）MAC芯片; （400）开关单元，MII / GMII开关; （AA，BB）磁性