公开(公告)号：KR101321259B1

公开(公告)日：2013-10-29

申请号：KR1020130058328

申请日：2013-05-23

Applicant: 목포대학교산학협력단

Inventor： 정석원 ,  이경효 ,  홍휘승 ,  김단환 ,  하국용

IPC: G06F7/575 ,  G06F7/50

CPC classification number: G06F7/721 ,  G06F7/728

Abstract: PURPOSE: A subtraction operation device for a Montgomery inverse algorithm and a method thereof are provided to perform a complementary operation and an add operation based on two variables, thereby comparing and operating sizes at the same time. CONSTITUTION: A comparison operation unit (110) compares the sizes of variable U and variable V. A subtraction operation unit (120) operates a difference value of the variable U and the variable V by performing an add operation with the complement of the bit values for the variable U and the variable V. The comparison operation unit compares the sizes of the variable U and the variable V by considering the most significant bit value of a reference value. When the most significant bit value is 1, the comparison operation unit determines that the variable U is bigger than the variable V. [Reference numerals] (110) Comparison operation unit; (120) Subtraction operation unit; (AA) Variable U; (BB) Variable V

Abstract translation: 目的：提供一种用于蒙哥马利逆算法的减法运算装置及其方法，用于基于两个变量执行互补运算和加法运算，从而同时比较和运算大小。 构成：比较运算单元（110）比较变量U和变量V的大小。减法运算单元（120）通过利用位值的互补执行加法运算来操作变量U和变量V的差分值 对于变量U和变量V.比较运算单元通过考虑参考值的最高有效位值来比较变量U和变量V的大小。 当最高有效位值为1时，比较运算单元确定变量U大于变量V. [参考数字]（110）比较运算单元; （120）减法运算单元; （AA）变量U; （BB）变量V

公开(公告)号：KR101321221B1

公开(公告)日：2013-10-22

申请号：KR1020130058329

申请日：2013-05-23

Applicant: 목포대학교산학협력단

Inventor： 정석원 ,  이경효 ,  홍휘승 ,  김단환 ,  하국용

IPC: G06F7/52 ,  G06F21/00

CPC classification number: G06F7/722 ,  G06F7/50 ,  G06F7/725 ,  H04L9/3006

Abstract: PURPOSE: A modular multiplication device for a password and a method are provided to repetitively perform a twice modulus operation and an add modulus operation, thereby implementing an elliptic curve on a finite field. CONSTITUTION: A coefficient selection unit (110) extracts a coefficient for each bit order for a multiplier from two elements. A twice modulus operation unit (120) performs a first twice modulus operation for a multiplication operation result for a most significant n-bit coefficient and a multiplicand. An add modulus operation unit (130) performs a first add modulus operation for a multiplication operation result for a (n-1) bit coefficient and the multiplicand. A control unit (140) repetitively performs the first twice modulus operation and the first add modulus operation for a lower bit coefficient and the multiplicand. [Reference numerals] (110) Coefficient selection unit; (120) Twice modulus operation unit; (130) Add modulus operation unit; (140) Control unit; (AA) Atom B; (BB) Atom A

Abstract translation: 目的：提供一种用于密码和方法的模数乘法装置，以重复执行两次模运算和加模运算，从而在有限域上实现椭圆曲线。 构成：系数选择单元（110）从两个元素提取乘法器的每个位顺序的系数。 双模运算单元（120）对于最高有效n位系数和被乘数的乘法运算结果执行第一两次模运算。 加法模数运算单元（130）对第（n-1）比特系数和被乘数的乘法运算结果进行第一加法运算。 控制单元（140）对低位系数和被乘数重复执行第一两次模运算和第一加模运算。 （附图标记）（110）系数选择单元; （120）两次模数运算单元; （130）加模运算单元; （140）控制单元; （AA）原子B; （BB）原子A