집적회로 칩 및 이의 제조방법
    1.
    发明公开
    집적회로 칩 및 이의 제조방법 无效
    集成电路芯片及其制造方法

    公开(公告)号:KR1020120061609A

    公开(公告)日:2012-06-13

    申请号:KR1020100122966

    申请日:2010-12-03

    Abstract: PURPOSE: An integrated circuit and a manufacturing method thereof are provided to improve electrical insulation properties of a penetrating electrode using a separation space as a dielectric gap. CONSTITUTION: A conductive structure(100) comprises a plurality of integrated circuit devices and connection structures. A wiring structure(200) comprises a metal wire for transmitting a signal to the conductive structure. A penetrating electrode(300) comprises a conductive plug(350), a base film, and a separation space. The conductive plug arranged inside a penetration hole is electrically connected to the metal wire or the connection structure. The base film arranged between the conductive plug and a side wall of the penetration hole is formed using a solid reaction of a reactant. The separation space covers the conductive plug by being formed using a difference of diffusion speed of reactant atoms during the solid reaction.

    Abstract translation: 目的:提供集成电路及其制造方法,以提高使用分离空间作为电介质间隙的穿透电极的电绝缘性。 构成:导电结构(100)包括多个集成电路器件和连接结构。 布线结构(200)包括用于将信号传输到导电结构的金属线。 穿透电极(300)包括导电塞(350),基膜和分离空间。 布置在穿透孔内部的导电塞电连接到金属线或连接结构。 使用反应物的固体反应形成布置在导电塞和穿透孔的侧壁之间的基膜。 通过在固体反应期间使用反应物原子的扩散速度的差异形成分离空​​间来覆盖导电塞。

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