-
-
公开(公告)号：KR1019920008283B1
公开(公告)日：1992-09-26
申请号：KR1019890020452
申请日：1989-12-30
Applicant: 삼성전자주식회사
IPC: G06F15/16
Abstract: The equipment transmits data between two asynchronous operating systems, and is commonly used as a data transmission interface even through the specifications of two systems are changed. The equipment comprises a RAM for storing the transmission data according to the clock of a transmitting system (1), the address and data mode indicating circuits (4,6) being connected to the RAM, a write address counter (5) for producing the write address according to the clock of the transmitting system, a frequency synch. circuit (3) for controlling the synchronization, and a timing buffer (8).
Abstract translation: 设备在两个异步操作系统之间传输数据，即使通过改变两个系统的规格，也常用作数据传输接口。 该设备包括RAM，用于根据发送系统（1）的时钟存储发送数据，地址和数据模式指示电路（4,6）连接到RAM;写入地址计数器（5），用于产生 根据发送系统的时钟写入地址，一个频率同步。 用于控制同步的电路（3）和定时缓冲器（8）。
-
-
-
-
Patent Agency Ranking
-
-
-
公开(公告)号：KR1019920008243B1
公开(公告)日：1992-09-25
申请号：KR1019890011834
申请日：1989-08-19
Applicant: 삼성전자주식회사
IPC: G09G3/36
Abstract: The circuit selectively displays the normal and reversal text characters on a dot-matrix liquid crystal display. The circuit comprises a counter means consisting of an address register (1) and an address counter (2), a scan counter (3) for sequentially counting the address of a RAM, a multiplexer (4) for providing the values of the scan counter and the address counter to the RAM according to the read/write signals, a RAM (5) for storing ROM codes, a control means for providing normal or reversal signal to a ROM (7) storing the characters, and a line counter (6).
Abstract translation: 该电路在点阵液晶显示器上选择性地显示正常和反转文本字符。 电路包括由地址寄存器（1）和地址计数器（2）组成的计数器装置，用于顺序计数RAM地址的扫描计数器（3），用于提供扫描计数器 和根据读/写信号的RAM的地址计数器，用于存储ROM代码的RAM（5），用于向存储字符的ROM（7）提供正常或反转信号的控制装置，以及行计数器（6） ）。
-
-
-
-
-
-
-
-
-
Search Results
11
records
(took 0.02 seconds)
