公开(公告)号：KR1020100058166A

公开(公告)日：2010-06-03

申请号：KR1020080116886

申请日：2008-11-24

Applicant: 삼성전자주식회사

Inventor： 황순욱 ,  박기태 ,  이재욱 ,  주한성

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/06

CPC classification number: G11C16/3404 ,  G11C16/344

Abstract: PURPOSE: A nonvolatile memory device and a memory system thereof are provided to supply a post program for improving a pass voltage window by controlling a develop time when a precharge voltage is discharged. CONSTITUTION: In a nonvolatile memory device and a memory system thereof, a memory cell array(110) is composed of a plurality of memory blocks. A decoder(130) is connected to a plurality of memory blocks through a word line. A page buffer circuit(120) is connected to a plurality of memory blocks through the bit line. The control logic controls a voltage supplied to the word line and the bit line according to the location of a memory block. A control logic(150) controls the develop time when a precharge voltage applied to the bit line is discharged.

Abstract translation: 目的：提供非易失性存储器件及其存储器系统，以通过控制放电时的显影时间来提供用于改善通过电压窗口的后期程序。 构成：在非易失性存储器件及其存储器系统中，存储单元阵列（110）由多个存储块构成。 解码器（130）通过字线连接到多个存储器块。 页面缓冲电路（120）通过位线连接到多个存储器块。 控制逻辑根据存储块的位置来控制提供给字线和位线的电压。 当施加到位线的预充电电压被放电时，控制逻辑（150）控制显影时间。