公开(公告)号：KR100920227B1

公开(公告)日：2009-10-05

申请号：KR1020070065082

申请日：2007-06-29

Applicant: 포항공과대학교 산학협력단

Inventor： 정홍 ,  박성찬 ,  첸차오

IPC: H04N13/00

CPC classification number: G06N7/005

Abstract: In a belief propagation based fast systolic array, a hierarchical dynamic Bayesian network of nodes corresponding to pixels of input left and right image pixel data is generated in consideration of an iteration axis and scale levels. Further, messages on the generated dynamic Bayesian network are updated in a specific axis direction on a Markov random field.

公开(公告)号：KR1020090001026A

公开(公告)日：2009-01-08

申请号：KR1020070065082

申请日：2007-06-29

Applicant: 포항공과대학교 산학협력단

Inventor： 정홍 ,  박성찬 ,  첸차오

IPC: H04N13/00

CPC classification number: G06N7/005

Abstract: A belief propagation based fast systolic array and a method thereof are provided to perform calculation in parallel through a small memory while reducing a size of the entire memory when a repetition frequency is lower by using a BP based characteristic of a layer structure, thereby accessing and rapidly processing a small distribution memory in a VLSI through a parallel processor. A systolic array comprises an image buffer(10) and an FBP stereo matching module(13). The image buffer stores right/left image pixel data inputted in a raster scan method. The FBP stereo matching module outputs a disparity image in a high speed parallel method by using pixel data outputted from the image buffer. The right/left image data are inputted. A hierarchic dynamic Bayesian network is generated. A message on the hierarchic dynamic Bayesian network is updated in a shaft direction on an MRF to obtain a disparity value.

Abstract translation: 提供了基于置信传播的快速收缩阵列及其方法，以通过使用基于BP的特征的层结构来重复频率较低时，通过小的存储器并行地执行计算，同时减少整个存储器的大小，从而访问和 通过并行处理器快速处理VLSI中的小型分配存储器。 收缩阵列包括图像缓冲器（10）和FBP立体匹配模块（13）。 图像缓冲器存储以光栅扫描方法输入的右/左图像像素数据。 FBP立体匹配模块通过使用从图像缓冲器输出的像素数据，以高速并行方式输出视差图像。 输入右/左图像数据。 生成分层动态贝叶斯网络。 层次动态贝叶斯网络上的消息在MRF上沿轴方向更新以获得视差值。