公开(公告)号：KR100775942B1

公开(公告)日：2007-11-15

申请号：KR1020060093560

申请日：2006-09-26

Applicant: 한국과학기술원

Inventor： 홍성철 ,  장재민

IPC: H03F1/22 ,  H03F3/217

CPC classification number: H03F1/223 ,  H03F3/217 ,  H03F2200/21

Abstract: An amplification device having plural D-class output amplifiers connected by cascade is provided to make the change of the bias point insensitive to the size ratio of a PMOS(P-channel Metal Oxide Semiconductor) and an NMOS(N-channel Metal Oxide Semiconductor) by disposing a bias point of each D-class output amplifier in the center. Plural D-class output amplifiers(200) of an amplification device including input and output stages connected by a resistor(103) are coupled in cascade through a capacitor(104). Each D-class output amplifier comprises an NMOS(101), a PMOS(102), and NPN(Negative-Positive-Negative) and PNP(Positive-Negative-Positive) BJTs(Bipolar Junction Transistor). Bias points of each D-class output amplifier are independently set by the resistor by preventing the front and rear D-class output amplifiers from being shown by cutting off DC(Direct Current) paths of each D-class output amplifier with the capacitor.

Abstract translation: 提供具有通过级联连接的多个D级输出放大器的放大装置，以使偏置点的改变对PMOS（P沟道金属氧化物半导体）和NMOS（N沟道金属氧化物半导体）的尺寸比不敏感， 通过将每个D级输出放大器的偏置点设置在中心。 包括由电阻器（103）连接的输入和输出级的放大装置的多个D级输出放大器（200）通过电容器（104）级联耦合。 每个D级输出放大器包括NMOS（101），PMOS（102）和NPN（负正负）和PNP（正 - 负 - 正）BJT（双极结晶体管））。 每个D级输出放大器的偏置点由电阻器独立设置，通过用电容器切断每个D级输出放大器的DC（直流）路径来防止前后D级输出放大器被显示。

公开(公告)号：KR100824773B1

公开(公告)日：2008-04-24

申请号：KR1020060112757

申请日：2006-11-15

Applicant: 한국과학기술원

Inventor： 홍성철 ,  장재민

IPC: H04B1/04

CPC classification number: H04B1/0475 ,  H04B1/0458 ,  H04B2001/0408

Abstract: A method for linear power amplification is provided to minimize a loss generated in an S-class power amplifier, a DC-DC(Direct Current) converter, and a regulator such as an LDO(Low Drop Output) used in the transmission of envelope information modulated in a structure such as a digital transmitter, an EER(Envelope Elimination and Restoration) transmitter, and a polar transmitter, thereby preventing the deterioration of efficiency while maintaining linearity. A method for linear power amplification comprises the following steps of: preparing the non-linear power amplification terminal of a cascode structure comprised of a common source transistor(200) and a common gate transistor(201); and applying a high-frequency phase signal(Vin+,Vin-) to the gate of the common source transistor and applying an envelope signal(Vs), which includes linearity and is modulated by digital, to the gate of the common gate transistor. The common source transistor and the common gate transistor is an NMOS(N-channel Metal Oxide Semiconductor) transistor or a PMOS(P-channel Metal-Oxide Semiconductor) transistor. The non-linear power amplification terminal is formed by a differential structure.

Abstract translation: 提供了一种用于线性功率放大的方法，以最小化S级功率放大器，DC-DC（直流）转换器和诸如用于传输信封信息中的LDO（低压降输出）的调节器所产生的损耗 在诸如数字发射机，EER（消除信封和恢复信号）发射机和极性发射机之类的结构中进行调制，从而在保持线性的同时防止效率的劣化。 一种用于线性功率放大的方法包括以下步骤：制备由公共源极晶体管（200）和公共栅极晶体管（201）构成的共源共栅结构的非线性功率放大端子; 以及将高频相位信号（Vin +，Vin-）施加到共源晶体管的栅极，并且将包含线性并且被数字调制的包络信号（Vs）施加到公共栅极晶体管的栅极。 公共源晶体管和公共栅极晶体管是NMOS（N沟道金属氧化物半导体）晶体管或PMOS（P沟道金属氧化物半导体）晶体管。 非线性功率放大端子由差分结构形成。

公开(公告)号：KR100778092B1

公开(公告)日：2007-11-21

申请号：KR1020060077195

申请日：2006-08-16

Applicant: 한국과학기술원

Inventor： 홍성철 ,  장재민 ,  박창근

IPC: H04B1/18

CPC classification number: H03F1/223 ,  H03F3/211

Abstract: A distributed transmission line transformer using additional pads for bond wire coupling is provided to minimize a decrease in a coupling coefficient and prevent deterioration in the total output power and efficiency of a power amplifier by using additional dummy pads in connecting an off-chip distributed transmission line transformer with an integrated circuit. In a distributed transmission line transformer(230), of which the primary and secondary transmission lines(231,232) are formed separately from a differential power amplifier(210) on a PCB substrate(310), the differential power amplifier(210), of which the output block is finalized as output pads(211), comprises two additional dummy pads(212). The PCB substrate(310) comprises two transformer pads(240a,240b) formed in the vicinity of the differential power amplifier(210). The primary transmission line(231) of the distributed transmission line transformer(230) is connected with the output pads(211) of the differential power amplifier(210) by wire bonding. The secondary transmission line(232) is connected to the transformer pads(240a,240b) via the dummy pads(212).

Abstract translation: 提供了使用用于接合线耦合的附加焊盘的分布式传输线变压器，以最小化耦合系数的降低，并且通过在连接片外分布式传输线路中使用附加的虚拟焊盘来防止功率放大器的总输出功率和效率的劣化 变压器带集成电路。 在分布式传输线变压器（230）中，其中一次和二次传输线（231,232）与PCB衬底（310）上的差分功率放大器（210）分开形成，差分功率放大器（210） 输出块被确定为输出焊盘（211），包括两个附加的虚拟焊盘（212）。 PCB基板（310）包括形成在差分功率放大器（210）附近的两个变压器焊盘（240a，240b）。 分布式传输线变压器（230）的主传输线（231）通过引线接合与差分功率放大器（210）的输出焊盘（211）连接。 二次传输线（232）经由虚拟焊盘（212）连接到变压器焊盘（240a，240b）。

公开(公告)号：KR100725225B1

公开(公告)日：2007-06-04

申请号：KR1020060077058

申请日：2006-08-16

Applicant: 한국과학기술원

Inventor： 홍성철 ,  장재민

IPC: H04B1/18

Abstract: A PCB(Printed Circuit Board) distributed transmission line transformer for a voltage combining method is provided to be formed on a PCB instead of being formed as an IC(Integrated Circuit) on a semiconductor substrate, thereby obtaining high Q-factors while length of the transmission line gets bigger. A primary transmission line(231) and a secondary transmission line(232) are formed on a PCB(310). Both ends of the primary transmission line(231) are connected to an amplification stage(210) having differential input as active elements on the PCB(310). Connection between the primary transmission line(231) and the amplification stage(210) is carried out through wire bonding processes(231a).

Abstract translation: 提供用于电压组合方法的PCB（印刷电路板）分布式传输线变压器以形成在PCB上而不是在半导体衬底上形成为IC（集成电路），从而获得高Q因子，同时获得 传输线路变大。 主传输线（231）和次传输线（232）形成在PCB（310）上。 主传输线（231）的两端连接到具有差分输入作为PCB（310）上的有源元件的放大级（210）。 主传输线（231）和放大级（210）之间的连接通过引线接合工艺（231a）进行。

公开(公告)号：KR100743951B1

公开(公告)日：2007-08-01

申请号：KR1020060067495

申请日：2006-07-19

Applicant: 한국과학기술원

Inventor： 박창근 ,  장재민 ,  홍성철

IPC: H01F27/00 ,  H01F27/29

Abstract: A distributed transmission line transformer using bond wires is provided to reduce power loss by forming a transformer to be floated in the air without an additional process technology by not contacting a power line of the transformer to a substrate. A distributed transmission line transformer using bond wires includes a differential electric power amplifier(210), a plurality of metal pads(234), a first side transmission line(231), and a second side transmission line(232). The differential electric power amplifier(210) is integrated and is installed on a PCB(Printed Circuit Board) substrate(310). The plurality of metal pads(234) are installed on the PCB substrate(310) to be separated from the differential electric power amplifier(210) at predetermined intervals. The first side transmission line(231) connects the metal pads(234) to an amplifier output pad(211) with a wire. The second side transmission line(232) is arranged on the PCB substrate(310) to be separated from the first side transmission line(231) at the predetermined intervals. Both sides of the second side transmission line(232) are connected to a transformer output pad(240).

Abstract translation: 提供使用键合线的分布式传输线变压器以通过形成变压器以漂浮在空气中而不需要额外的工艺技术通过不将变压器的电力线与基板接触来减少功率损失。 使用键合线的分布式传输线变压器包括差分功率放大器（210），多个金属焊盘（234），第一侧传输线（231）和第二侧传输线（232）。 差分功率放大器（210）集成并安装在PCB（印刷电路板）基板（310）上。 多个金属焊盘（234）以预定间隔安装在PCB基板（310）上以与差分功率放大器（210）分离。 第一侧传输线（231）利用导线将金属焊盘（234）连接至放大器输出焊盘（211）。 第二侧传输线（232）以预定间隔布置在PCB基板（310）上以与第一侧传输线（231）分离。 第二侧传输线（232）的两侧连接到变压器输出焊盘（240）。