公开(公告)号：KR100250466B1

公开(公告)日：2000-04-01

申请号：KR1019970075368

申请日：1997-12-27

Applicant: 한국전자통신연구원

Inventor： 김종배 ,  오형철 ,  박구영

IPC: G06F7/58

CPC classification number: G06F7/582

Abstract: PURPOSE: A method for implementing a random-number generator is provided to reduce a delay time for generating a random number generator by using a smaller hardware, thereby offering a critical path in implementing a hardware with respect to 2m+1 type modules. CONSTITUTION: The first, a subtraction of a matrix is performed and an addition with respect to one matrix gained through the subtraction is performed according to columns for implementing a matrix formula by a hardware. The process is described as follows. A series of matrix is performed for implementing 2m+1 modules of a random number generator. A 7 X 9 matrix is obtained by performing a process for decreasing '1' from the least significant bit of a minuend and for adding "1" from the most significant bit by calculating a subtraction of two matrixes by a subtraction of a binary number. A 8 X 19 matrix is obtained by adding a value of "constant 'c' +7" to the 7 X 9 matrix.

Abstract translation: 目的：提供一种实现随机数发生器的方法，通过使用较小的硬件来减少生成随机数发生器的延迟时间，从而为实现2m + 1型模块的硬件提供了关键路径。 构成：首先，执行矩阵的减法，并且根据通过硬件实现矩阵公式的列执行相对于通过减法获得的一个矩阵的相加。 该过程描述如下。 执行一系列矩阵来实现随机数发生器的2m + 1模块。 通过执行从最小有效位减1的处理，并通过减去二进制数减去两个矩阵，从最高有效位增加“1”来获得7×9矩阵。 通过向7×9矩阵添加“常数”c'+7“的值来获得8×19矩阵。

公开(公告)号：KR1019990055424A

公开(公告)日：1999-07-15

申请号：KR1019970075368

申请日：1997-12-27

Applicant: 한국전자통신연구원

Inventor： 김종배 ,  오형철 ,  박구영

IPC: G06F7/58

Abstract: 본 발명은 난수기의 효율적 구현방법에 관한 것으로, 특히 2m+1 주기 난수기의 효율적 구현방법에 관한 것이다.
본 발명은 난수기의 발생에 쓰이는 곱셈 연산, 덧셈연산 및 모듈(Modulo)연산을 행렬 연산 과정을 통하여 일련의 덧셈과정으로 변환하여 수행함으로서 효율적인 하드웨어 구현이 되도록 할수 있는 난수기의 효율적 구현방법을 제공한다.