디지털 신호의 소프트-결정 디매핑 방법
    1.
    发明公开
    디지털 신호의 소프트-결정 디매핑 방법 无效
    数字信号的软决策解决方法

    公开(公告)号:KR1020110070682A

    公开(公告)日:2011-06-24

    申请号:KR1020100030053

    申请日:2010-04-01

    CPC classification number: H04L25/067 H04L27/18

    Abstract: PURPOSE: A soft-decision demapping method of a digital signal is provided to reduce comparison calculation operation, by selecting a spot positioned in constellation with only phase information of a symbol in advance. CONSTITUTION: Reference symbols are selected using most significant bit(MSB) of a received signal. The selected reference symbols are selected according to location probability of the received signal among total reference symbols on the constellation. The maximum value of the log likelihood ratio(LLR) is acquired for the selected reference symbols. The total reference symbols are phase-shifted.

    Abstract translation: 目的:提供一种数字信号的软决策解映射方法,以通过仅预先标识符号中仅定位符号的相位信息选择位于星座中的光点来减少比较计算操作。 构成:使用接收信号的最高有效位(MSB)来选择参考符号。 所选择的参考符号是根据星座上的总参考符号之间的接收信号的位置概率来选择的。 对于所选择的参考符号获取对数似然比(LLR)的最大值。 总参考符号是相移的。

    주파수 오차 추정기 및 그것의 주파수 오차 추정 방법
    2.
    发明公开
    주파수 오차 추정기 및 그것의 주파수 오차 추정 방법 无效
    FREQUENCU错误估计器及其频率误差优化方法

    公开(公告)号:KR1020100073062A

    公开(公告)日:2010-07-01

    申请号:KR1020080131645

    申请日:2008-12-22

    CPC classification number: H04L27/22 H04L27/0014 H04L2027/0067 H04L1/004

    Abstract: PURPOSE: A frequency error estimating device and a frequency error estimating method thereof are provided to easily estimate a frequency error by low power consumption. CONSTITUTION: A plurality of autocorrelators(141-144) calculates autocorrelation through values outputted from the first registers. The second registers store the calculated autocorrelation values. Phase difference calculation blocks(161-165) calculate phase difference between symbols adjacent from the values saved in the second registers. An adder(177) adds up the calculated phase differences. The adder calculates a frequency error.

    Abstract translation: 目的:提供一种频率误差估计装置及其频率误差估计方法,以便通过低功耗容易地估计频率误差。 构成:多个自相关器(141-144)通过从第一寄存器输出的值来计算自相关。 第二个寄存器存储计算的自相关值。 相位差计算块(161-165)计算与保存在第二寄存器中的值相邻的符号之间的相位差。 加法器(177)将计算的相位差相加。 加法器计算频率误差。

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