Abstract:
PURPOSE: A timing offset estimating method and a device thereof are provided to estimate a timing offset by using predetermined target samples. CONSTITUTION: A pilot symbol extractor(210) extracts a pilot symbol from the OFDM(Orthogonal Frequency Division Multiplexing) symbol. An impulse response calculator(220) calculates the impulse response in the time domain by using the pilot symbol. A noise dispersion estimator(230) estimates the dispersion of the noises by using the OFDM symbol and the pilot symbol. A timing offset estimator(240) estimates the timing offset by using the dispersion of the noises and the impulse response.
Abstract:
PURPOSE: A residual frequency offset estimating method and a device thereof are provided to estimate a residual frequency offset by using target samples which are extracted based on the power of time samples of impulse response in the time domain. CONSTITUTION: A pilot symbol extractor(210) extracts a pilot symbol from an OFDM(Orthogonal Frequency Division Multiplexing) symbol. An impulse response calculator(230) calculates the impulse response in the time domain by using the pilot symbol. A noise dispersion estimator(220) estimates the dispersion of noises by using the OFDM symbol and the pilot symbol. A residual frequency offset estimator(240) estimates the residual frequency offset by using the dispersion of the noises and the impulse response.
Abstract:
A QAM symbol demapping method for downstream transmission of a cable and a QAM symbol demapping apparatus thereof are provided to perform QAM symbol demapping for a 64 QAM mode and a 256 QAM mode and to restore a bit signal without using a memory in downstream transmission. A QAM symbol demapping method for downstream transmission of a cable comprises the following steps of: demodulating a converted symbol and dividing the demodulated symbol into a code bit of I and Q symbols corresponding to amplitude information and an absolute value of the I and Q symbols corresponding to bit information; extracting the amplitude information by changing positions of I and Q in the absolute value of the I and Q symbols; extracting set partitioning information by using an LSB(Least Significant Bit) of the I and Q symbols for the extracted amplitude information and the code bit of the I and Q symbols.
Abstract:
A symbol slicing method and a symbol slicing apparatus of a scalable QAM(quadrature amplitude modulation) type are provided to maintain low hardware complexity regardless of the increment of a QAM modulation order by a logic operation using a least significant bit and an overall integral part of a sampling signal for in-phase and quadrature phase axes to be sampled as a digital value. A symbol slicing method in a digital demodulator having a QAM(quadrature amplitude modulation) type comprises the steps of: obtaining a digital integer value by sampling a symbol signal on an in-phase axis or a quadrature phase axis, respectively(S410,S420); and extracting a symbol bit stream on the in-phase axis or the quadrature phase axis using an entire bit stream and a least significant bit value of the digital integer value(S450). The step of extracting the symbol bit stream is characterized by setting the least significant bit value among the entire bit stream as '1'(S430).
Abstract:
A timing phase error creation method for improving resolving power of a timing phase error for measuring a performance of a digital receiver is provided to enhance a speed of measuring performance of demodulation algorithm of the digital receiver by reducing a memory and a calculation quantity for measuring the performance. A timing phase error creation method for improving resolving power of a timing phase error for measuring a performance of a digital receiver includes a matching filter and a memory. An arbitrary time delay element is applied to the matching filter for creating the timing phase error as much as t time. The timing phase error is created by calculating a constant of the matching filter delayed as much as t by moving an input signal as much as t. The constant of the matching filter is changed according to the timing phase error by using the memory.
Abstract:
1. 청구범위에 기재된 발명이 속하는 기술분야 본 발명은, 터보 인터리버의 출력 주소 산출 장치에 관한 것임. 2. 발명이 해결하려고 하는 기술적 과제 본 발명은, 메모리를 사용하지 않고, 카운터 클럭신호에 의한 유효신호에 따라 가산 및 감산을 반복적으로 수행하여 터보 인터리버의 출력 주소를 산출하는, 터보 인터리버의 출력 주소 산출 장치를 제공하는데 그 목적이 있음. 3. 발명의 해결 방법의 요지 본 발명은, 터보 인터리버의 출력 주소 산출 장치에 있어서, 프레임 크기(길이)에 따른 클럭신호를 발생시키기 위한 카운팅수단; 상기 카운팅수단으로부터의 클럭신호에 따라 유효신호를 생성하기 위한 유효신호 생성수단; 상기 유효신호에 따라, 기 저장되어 있는 제1 인터리빙 산출 파라미터를 입력받아, 가산 및 감산을 통해 제1 출력 주소 산출 파라미터를 계산하기 위한 가감산수단; 상기 카운팅수단에서 발생시킨 클럭신호 중 특정 비트를 선택신호로 입력받아, 기 저장되어 있다가 입력되는 제2 인터리빙 산출 파라미터 중 어느 하나를 제2 출력 주소 산출 파라미터로 선택하기 위한 선택수단; 및 상기 제1 및 제2 출력 주소 산출 파라미터를 입력받아, 가산 및 감산을 통해 출력 주소를 계산하기 위한 출력 주소 연산수단을 포함함. 4. 발명의 중요한 용도 본 발명은 터보 부호기 등에 이용됨. 위성 디지털 비디오 방송, 터보 부호기, 터보 인터리버, 출력 주소, 반복적 가감산
Abstract:
A recursive demodulation apparatus is provided. Therecursive demodulation apparatus, including: a segment generation unit dividing data symbols with a residual frequency or phase error into a predetermined number of data symbols, and generating a plurality of segments, each of the plurality of segments including the predetermined number of data symbols; and a phase error correction unit sequentially correcting a phase error of each of the data symbols, included in the each of the plurality of segments, for each segment.