公开(公告)号：JPH07241080A

公开(公告)日：1995-09-12

申请号：JP25590594

申请日：1994-10-21

Applicant: ABB MANAGEMENT AG

Inventor： KURISUCHIYAN GERUSHIYUTAA ,  RETO SHIEEPU

IPC: H02M7/155 ,  H02M1/088 ,  H02M7/12 ,  H02M7/219 ,  H03K17/10 ,  H02M1/00

Abstract: PURPOSE: To sustain balance of voltage load among respective switches in blocking state by an arrangement wherein the control voltage level is influenced by a measured voltage in blocking state in such a manner that the blocking voltage of power semiconductor switches connected in series is substantially equalized. CONSTITUTION: The voltage Ucei across each power semiconductor switch and the voltage Ucetot across the entire series circuit are measured by means of a driver 4. The difference (1/nUcetot -Ucei ) is formed from these two voltages and relayed to a first means 6 where the switching moment Tdon , Tdoff is determined for each switch. The means 6 is connected with a time lag circuit 9 for setting the switching moment of a control signal. Output from the circuit 9 is delivered, as a control voltage Uge , to the gate of the switch through a driver 7. The means 6 and the circuit 9 have such an effect on the control signal as a balanced voltage distribution is generated when switched.

公开(公告)号：JPH07221619A

公开(公告)日：1995-08-18

申请号：JP596995

申请日：1995-01-18

Applicant: ABB MANAGEMENT AG

Inventor： KURISUCHIYAN GERUSHIYUTAA ,  PATORITSUKU HOFUAA ,  RONARUDO ROONAA ,  RETO SHIEEPU

IPC: H03K17/08 ,  H03K17/0812 ,  H03K17/082 ,  H03K17/12

Abstract: PURPOSE: To provide a new method and device for balancing loads of parallel- connected power semiconductor modules by which uniform load distribution can be obtained by taking a difference in parameter and temperature into consid eration without using any additional connection choke. CONSTITUTION: In a method and device for balancing loads of parallel-connected power semiconductor modules, turningon/off times of switches 2 in power semiconductor modules are set so that an even current load may be obtained in all modules during the switching operation. Levels of gate voltages of the modules are also set so that uniform current distribution may be obtained when the switches 2 are conducted. Alternatively, the temperatures Ts of the switches 2 are measured and compared with the maximum allowable temperature Tmax and, when the former Ts is higher than the latter Tmax, the levels of the gate voltages are lowered.