公开(公告)号：EP3813246A1

公开(公告)日：2021-04-28

申请号：EP19205300.7

申请日：2019-10-25

Applicant: ABB Schweiz AG

Inventor： Bianda, Enea ,  Li, Tin-Ho ,  Huusari, Juha ,  Ho, Ngai-Man

IPC: H02M7/5387

Abstract: A full-bridge inverter (100) based on a unipolar switching scheme comprises a first branch (102) and a second branch (104) in parallel between a first DC node (10) and a second DC node (12), the first branch (102) comprising a first higher switch (106) and a first lower switch (108) in series, and the second branch (104) comprising a second higher switch (110) and a second lower switch (112) in series. A filter circuit (150) comprises a first inductor (152) and a second inductor (158). One pin (154) of the first inductor (152) is coupled with a first branch conductor (120), and the first branch conductor (120) is coupled between the first higher switch (106) and the first lower switch (108), and an opposite pin (156) of the first inductor (152) is electrically coupled with a first output node (190). One pin (160) of the second inductor (158) is coupled with a second branch conductor (122), the second branch conductor (122) is coupled between the second higher switch (110) and the second lower switch (112), and an opposite pin (162) of the second inductor (158) is coupled with a second output node (192) of the full-bridge inverter (100). A first filtering unit switch (164), a first filter diode (166), a second filter diode (168) and a second filtering unit switch (170) in series are coupled between the first branch conductor (120) and the second branch conductor (122), cathodes of the first diode (166) and the second diode (168) are coupled together. A cathode of a third filter diode (172) is coupled with the first output node (190), and a cathode of a fourth filter diode (174) is coupled with the second output node (192). The anodes of the third diode (172) and the fourth diode (174) are coupled together. A third inductor (176) is coupled between the cathodes of the first diode (166) and the second diode (168) and the anodes of the third diode (172) and the fourth diode (174).

公开(公告)号：EP3174190A1

公开(公告)日：2017-05-31

申请号：EP15196095.2

申请日：2015-11-24

Applicant: ABB Schweiz AG

Inventor： Soeiro, Thiago Batista ,  Park, Ki-Bum ,  Huusari, Juha ,  Canales, Francisco

IPC: H02M7/483

CPC classification number: H02M7/483 ,  H02M2001/0054 ,  Y02B70/1491

Abstract: The present invention is concerned with a three-level power electronic converter circuit topology with a first, lower frequency stage including a larger number of lower frequency switches and with a second, higher frequency stage including a smaller number of higher frequency switches. Only the higher frequency switches are realized or implemented by fast switching, wide bandgap semiconductors while the lower frequency switches are realized by conventional silicon based semiconductor switches, resulting in a split frequency converter circuit with an optimized use of, and investment in, fast switching semiconductors. The proposed power converter solution is well-suited for grid-connected inverter applications aiming for high power density.

Abstract translation: 本发明涉及三电平功率电子转换器电路拓扑，其具有包括较大数量的较低频率开关的第一较低频率级以及包括较少数量的较高频率开关的第二较高频率级。 只有高频开关通过快速开关，宽带隙半导体来实现或实现，而较低频率的开关通过传统的基于硅的半导体开关来实现，从而形成分离的频率转换器电路，其优化使用并投资于快速开关半导体 。 所提出的功率转换器解决方案非常适合以高功率密度为目标的并网逆变器应用。