公开(公告)号：JPH10290146A

公开(公告)日：1998-10-27

申请号：JP67598

申请日：1998-01-06

Applicant: ADVANCED MICRO DEVICES INC

Inventor： ASPACIO REUBEN ,  BHARADWAJA RAJESH ,  NGUYEN HIEU XUAN

IPC: H03K5/1252

Abstract: PROBLEM TO BE SOLVED: To provide the glitch eater circuit that eliminates a glitch signal caused within a predetermined period from a leading edge or a trailing edge of a signal pulse. SOLUTION: A glitch eater circuit includes an inverter connecting to a transmission gate 52 controlled by a 2-input XNOR (exclusive NOR) gate 58 that receives a latched signal at one input and receives a delayed and latched signal at the other input and the latched signal comes from the transmission gate 52. The latched signal is reset by a transistor(TR) 80.