公开(公告)号：JPH07312546A

公开(公告)日：1995-11-28

申请号：JP4675794

申请日：1994-03-17

Applicant: ADVANCED MICRO DEVICES INC

Inventor： BURATSUDOREE EI SHIYAAPU GIISU

IPC: H03K19/0175 ,  H03K19/00 ,  H03K19/017 ,  H03K19/0185

Abstract: PURPOSE: To provide an input buffer circuit for being used by a programmable logical device PLD. CONSTITUTION: An input buffer includes an invertor 200 constituted of a PMOS pull-up transistor 202 in half size of a corresponding NMOS pull-down transistor 204, and TTL compatibility can be obtained. To drive a high capacitance load a cascode transistor 300 is used for controlling the additional pull-up output driver 202 connected with the output of the invertor 200. The cascode 300 turns on the additional pull-up output driver 202, and this is allowed to function for covering the PMOS pull-up transistor 202 during the transition from a low state to a high state of the output. An input buffer includes a switching transistor connected between a VDD power source and the PMOS pull-up transistor 202.