公开(公告)号：JPH02181536A

公开(公告)日：1990-07-16

申请号：JP28982589

申请日：1989-11-07

Applicant: ADVANCED MICRO DEVICES INC

Inventor： KADEIREESAN ANNAMARAI

IPC: H04L29/02 ,  H04J3/06 ,  H04L7/04

Abstract: PURPOSE: To provide a synchronized token network system where bits of any information are not deleted by generating a clock signal and converting a digital signal in accordance with a preliminarily determined code to generate the start of a packet division and arranged synchronizing signals. CONSTITUTION: A means 60 which adjusts a synchronizing signal to respond to detection of the division for a preliminarily determined period is connected to a synchronizing signal generation means. A decoding and generation means 62 gives a decoded bit signal in response to the synchronizing signal and the converted serial digital signal. Consequently, any information is not deleted from an encoder/decoder(ENDEC) receiver.

公开(公告)号：JP2578668B2

公开(公告)日：1997-02-05

申请号：JP28982589

申请日：1989-11-07

Applicant: ADVANCED MICRO DEVICES INC

Inventor： KADEIREESAN ANNAMARAI

IPC: H04L29/02 ,  H04J3/06 ,  H04L7/04 ,  H04L12/56