公开(公告)号：JPS6471210A

公开(公告)日：1989-03-16

申请号：JP12039688

申请日：1988-05-17

Applicant: ADVANCED MICRO DEVICES INC

Inventor： KAANAN PII BUAIRABUAN ,  POURU MAKURAUDO

IPC: H03H21/00 ,  G06F7/49 ,  G06F17/10 ,  H03H17/00 ,  H03H17/02

Abstract: PURPOSE: To simplify a coefficient update algorithm by limiting the range of respective multiple bit coefficients expressed by binary codes. CONSTITUTION: An 8-tap digital filter 10 is provided with seven pieces of storage, namely, delay units 12, eight multipliers 14 and seven adder unit 16. In order to express the tap coefficient of this filter 10, direct type code signed digit(CSD) coding is adopted. The respective tap coefficients are expressed as a large number of multiple bit coefficient sections arranged from the most significant to the least significant. Since the combined CSD coded values of respective multibit coefficients do not have any direct relation with the decimal values of the coefficients, in this case, the range of respective multibit coefficients is limited. The resulted decimal number is given an increment or decrement corresponding to that range.