公开(公告)号：JPH05216698A

公开(公告)日：1993-08-27

申请号：JP18139592

申请日：1992-07-09

Applicant: ADVANCED MICRO DEVICES INC

Inventor： SUTEIIBUN BII SHIDOMAN ,  BURENDAN JIEI BATSUBU

IPC: G06F11/10 ,  H03M13/15

Abstract: PURPOSE: To apply new approach for the error correction of an inspection bit in an encoded data word. CONSTITUTION: When a single error is generated in a word arranged in an inspection bit, the inspection bit generated by an inspection bit generator 14 is stored, and the newly generated inspection bit is outputted to a memory 12 by an inspection bit output latch 16. Data are exact, the newly generated inspection bit is also exact, and when the data are latched out, the inspection bit can be simultaneously latched out to the memory 12. This circuit includes a syndrome generator 18, error corrector 34, and error detector 36, and when the error is not detected in the data word, the inspection bit in the memory is corrected by the newly generated inspection bit. Thus, the performance of an error detecting and correcting circuit can be improved.