1.
    发明专利
    未知

    公开(公告)号:DE60216582D1

    公开(公告)日:2007-01-18

    申请号:DE60216582

    申请日:2002-05-17

    Abstract: A fractional-N synthesizer and method of phase synchronising the output signal with the input reference signal in a fractional-N synthesizer by generating a synchronisation pulse at integer multiples of periods of the input reference signal and gating the synchronisation pulse to re-initialize the interpolator in the fractional-N synthesizer to synchronize the phase of the output signal with the input reference signal.

    2.
    发明专利
    未知

    公开(公告)号:DE60216582T2

    公开(公告)日:2007-09-27

    申请号:DE60216582

    申请日:2002-05-17

    Abstract: A fractional-N synthesizer and method of phase synchronising the output signal with the input reference signal in a fractional-N synthesizer by generating a synchronisation pulse at integer multiples of periods of the input reference signal and gating the synchronisation pulse to re-initialize the interpolator in the fractional-N synthesizer to synchronize the phase of the output signal with the input reference signal.

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