公开(公告)号：JPH08237121A

公开(公告)日：1996-09-13

申请号：JP4756995

申请日：1995-03-07

Applicant: ANALOG DEVICES INC

Inventor： JIYANOSU KOBUATSUKUSU ,  RONARUDO KURUUSEN

IPC: H03L7/08 ,  H03L7/087 ,  H03L7/093 ,  H03L7/099 ,  H03L7/107

Abstract: PURPOSE: To keep the center frequency difference between clocks A and B within prescribed percentages by providing a circuit which copies the output current of a VCO (b) out of VCOs (a) and (b), which output VCO and synthesizer clocks A and B respectively, to control the VCO (a). CONSTITUTION: VCOs 1 and 2 consisting of voltage V/current I converters 1 and 2 and current controlled oscillators ICO1 and ICO2 output VCO and synthesizer clocks 48 and 32. Converters 1 and 2 convert input voltages 51 and 28 to currents to drive oscillators ICO1 and ICO2, and a current copy circuit 80 uses a sampling and holding circuit 82 to copy the output current of the converter 2. The frequency of the oscillator ICO1 is increased/reduced by this copy current ICP to continuously keep the frequency of a clock 48 within several percentages of the frequency of a clock 32 practically. Thus, a PLL system which is simple and accurate and has a higher reliability is constituted by primary and secondary PLLs.