Super lattice modification of overlying transistor
    1.
    发明申请
    Super lattice modification of overlying transistor 有权
    上层晶体管的超晶格修饰

    公开(公告)号:US20040195562A1

    公开(公告)日:2004-10-07

    申请号:US10723382

    申请日:2003-11-25

    Inventor: Gordon Munns

    CPC classification number: H01L29/66462 H01L29/155 H01L29/2003 H01L29/7787

    Abstract: The invention provides a device having a substrate, a buffer region positioned upon the substrate, wherein the buffer region has an upper buffer region and a lower buffer region, a heterojunction region positioned upon the buffer region, and a superlattice positioned between the lower buffer region and the upper buffer region, wherein the device is configured to function as a heterojunction field effect transistor.

    Abstract translation: 本发明提供了一种具有衬底,位于衬底上的缓冲区的器件,其中缓冲区具有上缓冲区和下缓冲区,位于缓冲区上的异质结区和位于下缓冲区之间的超晶格 和上缓冲区,其中该器件被配置为用作异质结场效应晶体管。

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