公开(公告)号：WO1997000713A1

公开(公告)日：1997-01-09

申请号：PCT/US1996010875

申请日：1996-06-24

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  CARTER, Andrew, L.

IPC: A63F09/22

CPC classification number: A63F13/24 ,  A63F13/06 ,  A63F2300/1006 ,  A63F2300/1068 ,  G06F3/033

Abstract: An input control device is coupled to a host system. A displacement control device is centrally located in the input control device and controls the location of a cursor displayed over video images, scrolling of the video images and adjusting of the point of view of the images, the images being generated by the execution of an application program by a dedicated multimedia game system or a personal computer. The cursor can be used to point to a particular portion of the image (i.e. a target image), the portion being as small as a pixel. The input control device has a body which has both a concave and a convex edge which taper at the ends to form cusps of a crescent shape. The body has a hollow portion at or near the crests of the concave and convex edges. In one embodiment, a trackball assembly is employed as the displacement control device and is disposed within the hollow space so that a portion of its trackball extends up through the top surface of the body and is accessible to an operator. The operator rotates the trackball and the resulting displacement is translated by a microcontroller, coupled to the trackball device and located within the hollow portion, into digital information representing the magnitude and direction of the displacement. The digital displacement information generated by the microcontroller is then transmitted to the host system over a databus coupling the microcontroller to the host system. The host system converts the digital displacement information into signals which drive the video display to control the displayed images. A second embodiment employs a track pad as the displacement control device. Both embodiments also have two actuator buttons located at the crest of the convex edge, three actuator buttons located at the crest of the concave edge, four actuator buttons arranged in an arcuate pattern to the right of the trackball and four actuator buttons arranged in a cross pattern to the left of the trackball. The buttons can be programmed to identify, select, pull-down, drag or fire upon the target video images pointed to by the cursor, as well as to scroll or change point-of view based non-displacement switch activation.

Abstract translation: 输入控制装置耦合到主机系统。 位移控制装置位于输入控制装置的中心位置，并且控制在视频图像上显示的光标的位置，视频图像的滚动和图像的视点的调整，通过执行应用程序产生的图像 由专用多媒体游戏系统或个人计算机程序。 光标可以用于指向图像的特定部分（即，目标图像），该部分与像素一样小。 输入控制装置具有主体，该主体具有凹形和凸形边缘，其在端部处逐渐变细以形成新月形的尖端。 主体在凹凸边缘的顶部或附近具有中空部分。 在一个实施例中，使用轨迹球组件作为位移控制装置并且设置在中空空间内，使得其轨迹球的一部分向上延伸穿过主体的顶表面并且可操作者接近。 操作者旋转轨迹球，并且所产生的位移由耦合到轨迹球装置并位于中空部分内的微控制器转换成表示位移的大小和方向的数字信息。 然后由微控制器生成的数字位移信息通过将微控制器耦合到主机系统的数据总线传送到主机系统。 主机系统将数字位移信息转换成驱动视频显示的信号，以控制显示的图像。 第二实施例采用履带板作为位移控制装置。 两个实施例还具有位于凸缘顶部的两个致动器按钮，位于凹边缘顶部的三个致动器按钮，以轨迹球右侧的弧形图案布置的四个致动器按钮和以十字形布置的四个致动器按钮 轨迹球左侧的图案。 可以对按钮进行编程，以识别，选择，下拉，拖动或触发由光标指向的目标视频图像，以及滚动或更改基于非位移开关激活的视点。

公开(公告)号：WO1996039772A1

公开(公告)日：1996-12-12

申请号：PCT/US1996008493

申请日：1996-06-03

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  KARLSSON, Magnus, L. ,  CHEN, Kok, S.

IPC: H04N01/40

CPC classification number: H04N1/40087

Abstract: A system and method for halftoning multi-level pixels preferably uses a threshold array divided into two or more classes. The classes are ordered in a visitation order. Each class contains at least one element. A halftone cell comprised of a plurality of pixels corresponds to the threshold array. As the intensity level for the halftone cell increases, the pixels corresponding to the elements in the first class are halftoned by fractional values of pixels until all of the pixels in that class reach saturation. As the intensity of the halftone cell increases, none of the pixels corresponding to the elements in any other class change state. Once the pixels corresponding to the elements in the first class are saturated, the pixels corresponding to the elements in the second class are halftoned by fractional values of pixels. In more general terms, the next class in the class visitation order is not addressed until the pixels corresponding to all of the elements in the previous class are saturated.

Abstract translation: 用于半色调多级像素的系统和方法优选地使用分成两个或更多个类的阈值阵列。 课程按照访问次序排序。 每个类至少包含一个元素。 由多个像素组成的半色调单元对应于阈值阵列。 随着半色调细胞的强度水平增加，与第一类元素相对应的像素由像素的分数值进行半色调，直到该类的所有像素达到饱和。 随着半色调细胞的强度增加，对应于任何其他类别中的元素的像素都不会改变状态。 一旦对应于第一类中的元素的像素饱和，则与第二类中的元素对应的像素由像素的分数值进行半色调。 在更一般的术语中，类访问顺序中的下一个类不被解决，直到与先前类中的所有元素相对应的像素是饱和的。

公开(公告)号：WO1996039683A1

公开(公告)日：1996-12-12

申请号：PCT/US1996007301

申请日：1996-05-20

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  ANDRESEN, Kevin, W. ,  CHAN, Allen, M. ,  FISHMAN, Robert, C. ,  WALKER, Ted, W.

IPC: G06T11/00

CPC classification number: G06T11/001

Abstract: An image to be generated is analyzed to determine whether it is comprised solely of bi-level color data. If so, an indication is provided to a rendering device that a simpler rendering procedure, suitable for bi-level data, can be employed. However, full color information pertaining to the image is retained. If the rendering device is able to process the image data in a bi-level format, it does so, to thereby improve performance and reduce the amount of memory capacity that is required. If multi-level data is detected, the bi-level data is expanded and full color rendering is carried out in a conventional fashion.

Abstract translation: 分析要生成的图像，以确定其是否仅由双色彩色数据组成。 如果是这样，则向渲染设备提供适用于双层数据的更简单的渲染过程的指示。 然而，保留与图像有关的全色信息。 如果渲染设备能够以双层格式处理图像数据，则这样做，从而提高性能并减少所需的存储器容量。 如果检测到多级数据，则双层数据被扩展，并且以常规方式执行全色显示。

公开(公告)号：WO1996039680A1

公开(公告)日：1996-12-12

申请号：PCT/US1996007315

申请日：1996-05-20

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  ANDRESEN, Kevin, W. ,  MOLEDINA, Riaz, A. ,  SIMPSON, Mark ,  CHEN, Kok, S.

IPC: G06K15/00

CPC classification number: G06T9/00 ,  G06K15/00 ,  G06K2215/0002 ,  G06K2215/0011 ,  G06K2215/0014

Abstract: Non-real-time decompression of stored image data permits an unlimited amount of image data to be rendered with a limited amount of available memory. When the memory available to a display list (18) is filled with image data, it is rendered into a band buffer (44) and then compressed into a compressed band buffer (47), to free up the memory used by the original display list entries. Additional entries are then entered in the display list. After the remaining entries have been captured in the display list (18), the information stored in the compressed band buffers (47) is decompressed and stored in the uncompressed band buffer (44). The additional image data in the display list is then rendered, and combined with the previously rendered data in the uncompressed band buffer (44). After the rendering is completed, the contents of the uncompressed band buffer is again compressed into the compressed band buffer format. This procedure can be continually repeated until all of the image data has been rendered into respective bands, and the page of data is complete.

Abstract translation: 存储的图像数据的非实时解压缩允许以有限量的可用存储器呈现无限量的图像数据。 当对显示列表（18）可用的存储器填充有图像数据时，将其呈现为频带缓冲器（44），然后被压缩成压缩频带缓冲器（47），以释放由原始显示列表使用的存储器 条目。 然后在显示列表中输入附加条目。 在显示列表（18）中捕获剩余条目之后，存储在压缩频带缓冲器（47）中的信息被解压缩并存储在未压缩频带缓冲器（44）中。 然后显示列表中的附加图像数据被渲染，并且与未压缩的带缓冲器（44）中的先前渲染的数据组合。 渲染完成后，未压缩的带缓冲器的内容再次被压缩成压缩的带缓冲器格式。 可以连续地重复该过程，直到所有图像数据已经被渲染成相应的频带，并且数据页面完成。

公开(公告)号：WO1996039664A1

公开(公告)日：1996-12-12

申请号：PCT/US1996008496

申请日：1996-06-03

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  NUNZIATA, Ann, B.

IPC: G06F12/06

CPC classification number: G06F12/0607 ,  G06F12/0653

Abstract: A system and method for controlling DRAM wherein a memory subsystem can be populated by end users with any of a variety of DRAM chips. A memory controller will size each memory bank and determine whether paired memory banks are to be configured as interleaved or non-interleaved based upon the detected DRAM population. Bank selection logic is designed to account for both size and status (interleaved or non-interleaved) when determining which memory bank contains a memory location of interest. Row and column addressing is selected to minimize decoding of an incoming system address and reduce DRAM access time.

Abstract translation: 用于控制DRAM的系统和方法，其中存储器子系统可以由终端用户使用各种DRAM芯片中的任何一种来填充。 存储器控制器将对每个存储器块进行大小，并且基于检测到的DRAM容量来确定配对存储体是否被配置为交织或非交错。 在确定哪个存储体包含感兴趣的存储器位置时，存储体选择逻辑被设计为考虑尺寸和状态（交织或非交错）。 选择行和列寻址以最小化对输入系统地址的解码并减少DRAM访问时间。

公开(公告)号：WO1996039016A2

公开(公告)日：1996-12-05

申请号：PCT/US1996008201

申请日：1996-05-31

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  HEIRICH, Douglas, L.

IPC: H05K07/20

CPC classification number: H04N5/64 ,  G06F1/1601 ,  G06F2200/1611

Abstract: A multipiece housing is provided having a mid bucket (34), an aft bucket (32) secured to the mid bucket (34), and a replaceable lid (40) fastened to the aft bucket (32) having a thermal vent (22). The replaceable lid (40) includes a plurality of posts (14). The posts (14) are inserted against an inner wall of the aft bucket (32) to position and fasten the replaceable lid (40) to the top of aft bucket (32) during assembly. The replaceable lid (40) also includes snap features that clip onto an edge of the mid bucket to further secure the replaceable lid (40) to the bucket. If another replaceable lid having a thermal vent with a different ventilation capacity is desired, a different replaceable lid having a different thermal vent is simply fastened to the same monitor housing.

Abstract translation: 提供具有中间斗（34），固定到中斗（34）的后铲斗（32）和紧固到具有热通风口（22）的后铲斗（32））的可更换盖（40）的多片壳体， 。 可更换盖（40）包括多个柱（14）。 所述柱（14）抵靠所述后铲斗（32）的内壁插入，以在组装期间将所述可更换盖（40）定位并紧固到后铲斗（32）的顶部。 可替换的盖（40）还包括卡扣中间桶的边缘的卡扣特征，以进一步将可更换的盖（40）固定到铲斗。 如果需要具有不同通风能力的热通风口的另一个可替换的盖子，则具有不同热通风口的不同的可替换盖子简单地紧固到同一个监视器壳体上。

公开(公告)号：WO1996035996A1

公开(公告)日：1996-11-14

申请号：PCT/US1996006640

申请日：1996-05-08

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  REGAL, Michael, L. ,  FLAIG, Charles, M.

IPC: G06F13/40

CPC classification number: G06F13/385 ,  G06F13/405 ,  G06F13/4059

Abstract: An interface between two buses in different clock domains. The interface includes a master buffer which is used for both master writes and slave reads. A contro logic unit for each bus receives signals from a buffer manager which straddles the clock domains to gate latch pulses to the master buffer.

Abstract translation: 两个总线之间的接口在不同的时钟域。 该接口包括一个主缓冲区，用于主写和从读。 每个总线的控制逻辑单元从缓冲管理器接收信号，该缓冲器管理器将时钟域跨接到主缓冲器的锁存脉冲。

公开(公告)号：WO1996035285A1

公开(公告)日：1996-11-07

申请号：PCT/US1996004556

申请日：1996-04-02

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  CLERON, Michael, A. ,  FISHER, Stephen ,  BRUCK, Timo

IPC: H04L29/06

CPC classification number: H04L29/06

Abstract: An extensible and replaceable network-oriented component system provides a platform for developing network navigation components that operate on a variety of hardware and software computer systems. These navigation components include key integrating components along with components configured to deliver conventional services directed to computer networks, such as Gopher-specific and Web-specific components. Communication among these components is achieved through novel application programming interfaces (APIs) to facilitate integration with an underlying software component architecture. Such a highly-modular cooperating layered-arrangement between the network component system and the component architecture allows any existing component to be replaced, and allows new components to be added, without affecting operation of the network component system.

Abstract translation: 可扩展和可替换的面向网络的组件系统为开发在各种硬件和软件计算机系统上运行的网络导航组件提供了一个平台。 这些导航组件包括关键集成组件以及配置为提供定向到计算机网络的常规服务的组件，例如Gopher特定和Web特定组件。 通过新颖的应用程序编程接口（API）实现这些组件之间的通信，以便于与底层软件组件架构的集成。 网络组件系统和组件架构之间的这种高度模块化的协同分层布置允许任何现有的组件被替换，并允许添加新的组件，而不影响网络组件系统的操作。

公开(公告)号：WO1996035174A2

公开(公告)日：1996-11-07

申请号：PCT/US1996006242

申请日：1996-05-02

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  KELLY, James, D. ,  POLZIN, R., Stephen

IPC: G06F13/364

CPC classification number: G06F13/364

Abstract: A computer system has a system bus (204) including an address bus (206) and a data bus (205) and, operatively connected to the system bus, multiple master devices (219, 220), including a microprocessor (203, 218), and multiple slave devices (219, 220, 300). An address arbitration (BG) vector is formed of address arbitration signals (BR) for the master devices. An address termination (SACK) vector is formed of address termination signals for the slave devices, and a read-ready (RDDA) vector is formed of read-ready signals for the slave devices. The address arbitration vector and the address termination vector are sampled. Using a queue structure (601, 602) having a front and a rear, pairs of address arbitration and address termination vectors are queued. Given a pair of address arbitration (BG) and address termination (SACK) vectors at the head of the queue structure and a subsequent, corresponding read-ready (RDDA) vector, a data arbitration signal is issued to one of the slave devices and one of the master devices, as a "paired data bus grant".

Abstract translation: 计算机系统具有包括地址总线（206）和数据总线（205）的系统总线（204），并且可操作地连接到系统总线，多个主设备（219,220）包括微处理器（203,218） ，以及多个从设备（219,220,300）。 地址仲裁（BG）向量由主设备的地址仲裁信号（BR）形成。 地址终止（SACK）向量由从设备的地址终止信号形成，并且从就绪（RDDA）向量由从设备的读就绪信号形成。 对地址仲裁向量和地址终止向量进行采样。 使用具有前后的队列结构（601,602），对地址仲裁和地址终止矢量进行排队。 给定队列结构的头部的一对地址仲裁（BG）和地址终止（SACK）向量和随后的相应的读准备（RDDA）向量，向一个从设备发出数据仲裁信号，一个 的主设备，作为“配对数据总线授权”。

公开(公告)号：WO1996035171A1

公开(公告)日：1996-11-07

申请号：PCT/US1996006316

申请日：1996-05-03

Applicant: APPLE COMPUTER, INC.

Inventor： APPLE COMPUTER, INC. ,  KNIGHT, Holly, N. ,  SUTTON, Carl, D. ,  MERETSKY, Wayne, N. ,  MIMMS, Alan, B.

IPC: G06F13/10

CPC classification number: G06F13/102 ,  Y10S707/99945 ,  Y10S707/99948

Abstract: A computer system handling multiple applications wherein groups of I/O services are accessible through separate application programming interfaces. Each application has multiple application programming interfaces by which to access different families of I/O services, such as I/O devices.

Abstract translation: 处理多个应用程序的计算机系统，其中I / O服务组可通过单独的应用程序编程接口访问。 每个应用程序都有多个应用程序编程接口，用于访问I / O服务的不同系列，如I / O设备。