Abstract:
Techniques are disclosed relating to power management within a display pipeline (200). The display buffer (114) receives image data (202) through a data transfer interconnect. A data transfer interconnect is powered down based on the display pipeline (200) operating in a scaling mode or in a non-scaling mode. The display buffer (114) transmits at least a portion of the image data to one or more components of the display pipeline (200), and in response to the transmitting, the data transfer interconnect is powered up. In some embodiments, the display buffer (114) includes a plurality of line buffers (310a-x), each configured to store a respective image source line (312). In such an embodiment, a display pipeline (200) configured to render images to be displayed includes the display buffer (114), and the powering down is performed in response to the received image data including two or more image source lines (312).
Abstract:
In an embodiment, hardware implementing a transcendental or other non-linear function is based on a series expansion of the function. For example, a Taylor series expansion may be used as the basis. One or more of the initial terms of the Taylor series may be used, and may be implemented in hardware. In some embodiments, modifications to the Taylor series expansion may be used to increase the accuracy of the result. In one embodiment, a variety of bit widths for the function operands may be acceptable for use in a given implementation. A methodology for building a library of series-approximated components for use in integrated circuit design is provided which synthesizes the acceptable implementations and tests the results for accuracy. A smallest (area-wise) implementation which produces a desired level of accuracy may be selected as the library element.