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    CONCURRENT INLINE CACHE OPTIMIZATION IN ACCESSING DYNAMICALLY TYPED OBJECTS
    1.
    发明申请
    CONCURRENT INLINE CACHE OPTIMIZATION IN ACCESSING DYNAMICALLY TYPED OBJECTS 审中-公开
    访问动态类型对象的同步快速入门优化

    公开(公告)号：WO2015031192A1

    公开(公告)日：2015-03-05

    申请号：PCT/US2014/052286

    申请日：2014-08-22

    Applicant: APPLE INC.

    Inventor： PIZLO, Filip J.

    IPC: G06F9/45 ,  G06F9/455 ,  G06F9/44

    CPC classification number: G06F12/0815 ,  G06F8/315 ,  G06F8/4443 ,  G06F9/4491 ,  G06F9/451 ,  G06F9/45504 ,  G06F9/45508 ,  G06F9/45516 ,  G06F9/4552 ,  G06F9/45529 ,  G06F2212/621

    Abstract: A method and an apparatus for concurrent accessing of dynamically type objects based on inline cache code are described. Inline cache initialization in a single thread may be off loaded to an interpreter without incurring unnecessary synchronization overhead. A thread bias mechanism may be provided to detect whether a code block is executed in a single thread. Further, the number of inline cache initializations performed via a compiler, such as baseline JIT compiler, can be reduced to improve processing performance.

    Abstract translation: 描述了一种基于内联高速缓存代码并行访问动态类型对象的方法和装置。 单线程中的内联缓存初始化可能会被卸载到解释器，而不会引起不必要的同步开销。 可以提供线偏置机构来检测在单个线程中是否执行代码块。 此外，可以减少通过编译器（如基线JIT编译器）执行的内联高速缓存初始化的数量，以提高处理性能。

    GEOMETRIC 64-BIT CAPABILITY POINTER
    2.
    发明申请
    GEOMETRIC 64-BIT CAPABILITY POINTER 审中-公开

    公开(公告)号：WO2019172987A1

    公开(公告)日：2019-09-12

    申请号：PCT/US2019/012288

    申请日：2019-01-04

    Applicant: APPLE INC.

    Inventor： PIZLO, Filip J. ,  HUNT, Oliver J.

    IPC: G06F12/02 ,  G06F12/14

    Abstract: One embodiment provides for a computer-implemented method comprising receiving a request to compile a set of program instructions coded in a high-level language, the set of program instructions including a pointer to a virtual memory address, the pointer having a pointer encoding including a base address and a length; while compiling the set of program instructions, decoding the base address and length from the pointer, wherein the base address specifies a first boundary for a memory allocation, the length defines a second boundary for the memory allocation and the length is an encoding of a size of the memory allocation; and generating a set of compiled instructions which, when executed, enable access to a physical address associated with a virtual address between the first boundary and the second boundary.

    CONCURRENT ACCESSES OF DYNAMICALLY TYPED OBJECT DATA
    3.
    发明申请
    CONCURRENT ACCESSES OF DYNAMICALLY TYPED OBJECT DATA 审中-公开
    动态类型对象数据的并发访问

    公开(公告)号：WO2015031193A1

    公开(公告)日：2015-03-05

    申请号：PCT/US2014/052289

    申请日：2014-08-22

    Applicant: APPLE INC.

    Inventor： PIZLO, Filip J.

    IPC: G06F9/45 ,  G06F9/455

    CPC classification number: G06F12/0815 ,  G06F8/315 ,  G06F8/4443 ,  G06F9/4491 ,  G06F9/451 ,  G06F9/45504 ,  G06F9/45508 ,  G06F9/45516 ,  G06F9/4552 ,  G06F9/45529 ,  G06F2212/621

    Abstract: A method and an apparatus for an enhanced object model to allow concurrent execution for program code generated from dynamic programming languages, such as JavaScript, are described. An index structure may be introduced to an object model representing a dynamically typed object in addition to a type structure and a data payload storing property or field values of the object. Elements of the index structure may point at corresponding property values as an indirection for accessing the object.

    Abstract translation: 描述了用于允许从动态编程语言（例如JavaScript）生成的程序代码的并发执行的增强对象模型的方法和装置。 索引结构可以被引入到表示动态类型对象的对象模型，除了类型结构和数据有效载荷存储对象的属性或字段值之外。 索引结构的元素可以指向相应的属性值作为访问对象的间接。

    HARDWARE VERIFICATION OF DYNAMICALLY GENERATED CODE
    4.
    发明申请
    HARDWARE VERIFICATION OF DYNAMICALLY GENERATED CODE 审中-公开

    公开(公告)号：WO2022094165A1

    公开(公告)日：2022-05-05

    申请号：PCT/US2021/057172

    申请日：2021-10-29

    Applicant: APPLE INC.

    Inventor： GONION, Jeffrey E. ,  SNYDER, Michael D. ,  PIZLO, Filip J.

    IPC: G06F21/56 ,  G06F21/62 ,  G06F21/64 ,  H04L9/08

    Abstract: In an embodiment, dynamically-generated code may be supported in the system by ensuring that the code either remains executing within a predefined region of memory or exits to one of a set of valid exit addresses. Software embodiments are described in which the dynamically-generated code is scanned prior to permitting execution of the dynamically- generated code to ensure that various criteria are met including exclusion of certain disallowed instructions and control of branch target addresses. Hardware embodiments are described in which the dynamically-generated code is permitted to executed but is monitored to ensure that the execution criteria are met.

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