公开(公告)号：CA2140963A1

公开(公告)日：1996-04-12

申请号：CA2140963

申请日：1995-01-24

Applicant: ATI TECHNOLOGIES INC

Inventor： VARGA GABRIEL

IPC: G06F12/04 ,  G09G5/39 ,  G09G5/393 ,  G06F13/16

Abstract: A memory address pointer that selects a memory location that is mapped to a video graphics circuit port is incremented only when all bytes in a memory location have been read from or written to by the host CPU. This does not depend on the order in which the host CPU reads or writes data bytes. Therefore a video controller that uses the present invention will work with 8 bit, 16 bit as well as high performance 32 bit input/output instructions.

公开(公告)号：CA2140963C

公开(公告)日：1997-12-16

申请号：CA2140963

申请日：1995-01-24

Applicant: ATI TECHNOLOGIES INC

Inventor： VARGA GABRIEL

IPC: G06F12/04 ,  G09G5/39 ,  G09G5/393 ,  G06F13/16

Abstract: A memory address pointer that selects a memory location that is mapped to a video graphics circuit port is incremented only when all bytes in a memory location have been read from or written to by the host CPU. This does not depend on the order in which the host CPU reads or writes data bytes. Therefore a video controller that uses the present invention will work with 8 bit, 16 bit as well as high performance 32 bit input/output instructions.