Method for protecting electronic circuit against fault-based attacks
    1.
    发明专利
    Method for protecting electronic circuit against fault-based attacks 有权
    防止基于故障的攻击的电子电路的方法

    公开(公告)号:JP2011072040A

    公开(公告)日:2011-04-07

    申请号:JP2011002280

    申请日:2011-01-07

    Abstract: PROBLEM TO BE SOLVED: To provide a method to secure an electronic assembly implementing any arbitrary algorithm against attacks by error introduction.
    SOLUTION: The method consists in performing an additional calculation using a verification function on at least one intermediate result in order to obtain a calculation signature and in performing at least once more all or part of the calculation in order to recalculate the signature and compare them in order to detect a possible error.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种方法来确保实现任何任意算法的电子组件,以防止错误引入的攻击。 解决方案:该方法包括使用至少一个中间结果的验证功能执行附加计算,以获得计算签名,并且至少执行全部或部分计算以重新计算签名,以及 比较它们以检测可能的错误。 版权所有(C)2011,JPO&INPIT

    Method for making safe electronic cryptography assembly with secret key
    2.
    发明专利
    Method for making safe electronic cryptography assembly with secret key 有权
    用秘密钥匙制作安全电子胶印装置的方法

    公开(公告)号:JP2011101413A

    公开(公告)日:2011-05-19

    申请号:JP2011005165

    申请日:2011-01-13

    CPC classification number: H04L9/003 H04L9/0625 H04L2209/046

    Abstract: PROBLEM TO BE SOLVED: To eliminate a risk of an "n-order DPA (Differential Power Analysis)" attack for all values of n of a cryptographic electronic assembly or a system having a secret key or a private key.
    SOLUTION: A securing process for an electronic system includes a processor and a memory for packaging a cryptographic calculation procedure stored in a memory by use of the secret key. An intermediate result during an input or an output of at least one critical function about the procedure is masked.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:为了消除密码电子组件或具有密钥或私钥的系统的所有n值的“n阶DPA(差分功率分析)”攻击的风险。 解决方案:电子系统的固定过程包括处理器和存储器,用于通过使用秘密密钥来封装存储在存储器中的加密计算程序。 在关于该过程的至少一个关键功能的输入或输出期间的中间结果被屏蔽。 版权所有(C)2011,JPO&INPIT

    4.
    发明专利
    未知

    公开(公告)号:BR0312561A

    公开(公告)日:2005-12-20

    申请号:BR0312561

    申请日:2003-07-07

    Applicant: AXALTO SA

    Abstract: The method involves performing an additional calculation by a verification function on an intermediate result to obtain a calculation signature. A part of the calculation is performed to recalculate the signature and compare them to detect a possible error. An elementary operation using another super-function operation is performed from a larger set. Independent claims are also included for the following: (a) an electronic assembly comprising storage unit of a calculation process (b) a computer program including program code instructions to execute the steps of securing an electronic assembly (c) a smart card comprising a storage unit of a calculation process.

    Method for protecting an electronic circuit against fault-based attacks

    公开(公告)号:AU2003249501A8

    公开(公告)日:2004-01-23

    申请号:AU2003249501

    申请日:2003-07-07

    Applicant: AXALTO SA

    Abstract: The method involves performing an additional calculation by a verification function on an intermediate result to obtain a calculation signature. A part of the calculation is performed to recalculate the signature and compare them to detect a possible error. An elementary operation using another super-function operation is performed from a larger set. Independent claims are also included for the following: (a) an electronic assembly comprising storage unit of a calculation process (b) a computer program including program code instructions to execute the steps of securing an electronic assembly (c) a smart card comprising a storage unit of a calculation process.

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