公开(公告)号：US20220223507A1

公开(公告)日：2022-07-14

申请号：US17707801

申请日：2022-03-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Tsung-Tang TSAI ,  Huang-Hsien CHANG ,  Ching-Ju CHEN

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/00 ,  H01L23/13

Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.

公开(公告)号：US20240021540A1

公开(公告)日：2024-01-18

申请号：US18234300

申请日：2023-08-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Min Lung HUANG ,  Huang-Hsien CHANG ,  Tsung-Tang TSAI ,  Ching-Ju CHEN

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

CPC classification number: H01L23/562 ,  H01L23/3128 ,  H01L23/3675 ,  H01L23/5383 ,  H01L23/5386 ,  H01L21/4853 ,  H01L21/4857 ,  H01L21/4871 ,  H01L21/565 ,  H01L24/16 ,  H01L2924/3512 ,  H01L2224/16227

Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.

公开(公告)号：US20210233836A1

公开(公告)日：2021-07-29

申请号：US16942579

申请日：2020-07-29

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Tsung-Tang TSAI ,  Huang-Hsien CHANG ,  Ching-Ju CHEN

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/13 ,  H01L21/48

Abstract: A substrate structure includes a wiring structure, a first bump pad, a second bump pad and a compensation structure. The wiring structure includes a plurality of redistribution layers. The first bump pad and the second bump pad are bonded to and electrically connected to the wiring structure. An amount of redistribution layers disposed under the first bump pad is greater than an amount of redistribution layers disposed under the second bump pad. The compensation structure is disposed under the second bump pad.

公开(公告)号：US20210104595A1

公开(公告)日：2021-04-08

申请号：US17102258

申请日：2020-11-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Huang-Hsien CHANG ,  Tsung-Tang TSAI ,  Hung-Jung TU

IPC: H01L49/02 ,  H01L23/522 ,  H01L21/308 ,  H01L21/02 ,  H01L21/3105 ,  H01L21/285

Abstract: A vertical capacitor structure includes a substrate, at least a pillar, a first conductive layer, a first dielectric layer and a second conductive layer. The substrate defines a cavity. The pillar is disposed in the cavity. The first conductive layer covers and is conformal to the cavity of the substrate and the pillar, and is insulated from the substrate. The first dielectric layer covers and is conformal to the first conductive layer. The second conductive layer covers and is conformal to the first dielectric layer. The first conductive layer, the first dielectric layer and the second conductive layer jointly form a capacitor component.

公开(公告)号：US20240429213A1

公开(公告)日：2024-12-26

申请号：US18212155

申请日：2023-06-20

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Pao-Nan LEE ,  Yu-Hsun CHANG ,  Jung Jui KANG

IPC: H01L25/10 ,  H01L23/00 ,  H01L23/31 ,  H01L23/498 ,  H01L23/64

Abstract: An electronic device is provided. The electronic device includes a package structure and a power regulating element. The package structure includes an electronic component, a plurality of first conductive structures, and an encapsulant. The plurality of first conductive structures are connected to the electronic component. The encapsulant encapsulates the electronic component and exposes a portion of the plurality of first conductive structures. The power regulating component includes a plurality of second conductive structures directly bonded with the plurality of first conductive structures and configured to provide the electronic component with a power signal.

公开(公告)号：US20220122919A1

公开(公告)日：2022-04-21

申请号：US17071989

申请日：2020-10-15

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Huang-Hsien CHANG

IPC: H01L23/538 ,  H01L23/00 ,  H01L21/48

Abstract: A wiring structure and a method for manufacturing the same are provided. The wiring structure includes a substrate structure, a redistribution structure, an adhesive layer and at least one conductive pillar. The redistribution structure includes at least one dielectric layer. The at least one dielectric layer defines at least one through hole extending through the dielectric layer. The adhesive layer is disposed between the redistribution structure and the substrate structure and bonds the redistribution structure and the substrate structure together. The at least one conductive pillar extends through the redistribution structure and the adhesive layer and is electrically connected to the substrate structure. A portion of the at least one conductive pillar is disposed in the through hole of the at least one dielectric layer.

公开(公告)号：US20210118812A1

公开(公告)日：2021-04-22

申请号：US16656331

申请日：2019-10-17

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Min Lung HUANG ,  Huang-Hsien CHANG ,  Tsung-Tang TSAI ,  Ching-Ju CHEN

IPC: H01L23/00 ,  H01L23/31 ,  H01L23/367 ,  H01L23/538 ,  H01L21/48 ,  H01L21/56

Abstract: A package structure includes a wiring structure, a first electronic device, a second electronic device and a reinforcement structure. The wiring structure includes at least one dielectric layer, and at least one circuit layer in contact with the dielectric layer. The at least one circuit layer includes at least one interconnection portion. The first electronic device and the second electronic device are electrically connected to the wiring structure. The second electronic device is electrically connected to the first electronic device through the at least one interconnection portion of the at least one circuit layer. The reinforcement structure is disposed above the at least one interconnection portion of the at least one circuit layer.

公开(公告)号：US20240421086A1

公开(公告)日：2024-12-19

申请号：US18211222

申请日：2023-06-16

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pao-Nan LEE ,  Syu-Tang LIU ,  Yu-Hsun CHANG

IPC: H01L23/528 ,  H01L25/065

Abstract: An electronic device is disclosed. The electronic device includes a first electronic component, a second electronic component, and a circuit structure. The circuit structure is supported by the first electronic component and the second electronic component. The circuit structure electrically connects the first electronic component to the second electronic component and is configured to provide the first electronic component and the second electronic component with a power.

公开(公告)号：US20220028596A1

公开(公告)日：2022-01-27

申请号：US16937498

申请日：2020-07-23

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Syu-Tang LIU ,  Huang-Hsien CHANG ,  Yunghsun CHEN

IPC: H01F27/28 ,  H01F27/24 ,  H01F27/32 ,  H01F27/40 ,  H05K1/18 ,  H05K3/30 ,  H05K3/46 ,  H01F41/04

Abstract: An inductor unit includes a conductive structure, a first magnetic element and an insulating layer. The conductive structure has a bottom conductive layer, a top conductive layer, and a first side conductive layer extending from the bottom conductive layer to the top conductive layer. The first magnetic element is disposed on the bottom conductive layer of the conductive structure. The insulating layer is disposed on the bottom conductive layer of the conductive structure, wherein the insulating layer covers and surrounds the first magnetic element. The circuit structure including the inductor unit and the methods for manufacturing the same are also provided.

公开(公告)号：US20200343336A1

公开(公告)日：2020-10-29

申请号：US16395156

申请日：2019-04-25

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Shao Hsuan CHUANG ,  Huang-Hsien CHANG ,  Min Lung HUANG ,  Yu Cheng CHEN ,  Syu-Tang LIU

IPC: H01L49/02

Abstract: The subject application relates to a semiconductor package device, which includes a first conductive layer; a semiconductor wall disposed on the first conductive layer; a first conductive wall disposed on the first conductive layer; and an insulation layer disposed on the first conductive layer and between the semiconductor wall and the first conductive wall.