公开(公告)号：US09952981B2

公开(公告)日：2018-04-24

申请号：US14499286

申请日：2014-09-29

Applicant: APPLE INC.

Inventor： Alex Radinski ,  Tsafrir Kamelo

IPC: G06F12/00 ,  G06F12/121 ,  G06F12/0868 ,  G11C11/56

CPC classification number: G06F12/121 ,  G06F12/0868 ,  G06F2212/1021 ,  G06F2212/1024 ,  G06F2212/1028 ,  G06F2212/214 ,  G06F2212/312 ,  G11C11/5642 ,  G11C2211/5641 ,  Y02D10/13

Abstract: A method includes reading memory pages from a non-volatile memory that holds at least first memory pages having a first bit significance and second memory pages having a second bit significance, different from the first bit significance. At least some of the read memory pages are cached in a cache memory. One or more of the cached memory pages are selected for eviction from the cache memory, in accordance with a selection criterion that gives eviction preference to the memory pages of the second bit significance over the memory pages of the first bit significance. The selected memory pages are evicted from the cache memory.

公开(公告)号：US09779818B2

公开(公告)日：2017-10-03

申请号：US14794862

申请日：2015-07-09

Applicant: APPLE INC.

Inventor： Barak Baum ,  Alex Radinski ,  Eyal Gurgi ,  Naftali Sommer ,  Tsafrir Kamelo

IPC: G11C7/14 ,  G11C29/52 ,  G11C29/04 ,  G11C29/02 ,  G11C27/00 ,  G11C16/34 ,  G11C11/56 ,  G06F11/10 ,  G06F11/07 ,  G11C16/10 ,  G11C16/28 ,  G11C29/42 ,  G11C16/26

CPC classification number: G11C16/10 ,  G06F11/1012 ,  G11C7/14 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/28 ,  G11C16/3418 ,  G11C16/3459 ,  G11C27/005 ,  G11C29/021 ,  G11C29/028 ,  G11C29/42 ,  G11C2029/0409

Abstract: A method includes storing data in memory cells by programming the memory cells with respective values. The memory cells are read in multiple readout operations that each compares the programmed values to at least first and second read thresholds, while keeping the first read threshold fixed throughout the readout operations and perturbing only the second read threshold between the readout operations. A preferred value for the second read threshold is estimated based on the multiple readout operations.

公开(公告)号：US08773905B1

公开(公告)日：2014-07-08

申请号：US13786792

申请日：2013-03-06

Applicant: Apple Inc.

Inventor： Alex Radinski ,  Barak Baum ,  Eyal Gurgi ,  Micha Anholt ,  Ronen Dar ,  Tomer Ish-Shalom ,  Yael Shur

IPC: G11C16/26 ,  G11C16/34 ,  G11C27/00 ,  G11C16/04

CPC classification number: G11C16/04 ,  G11C11/5642 ,  G11C16/26 ,  G11C27/005 ,  G11C2211/5641

Abstract: A method includes performing a read operation that reads data from a group of analog memory cells using at least one read threshold, to produce readout results. A detection is made that the read threshold is set in a restricted range that causes the readout results not to reflect the read threshold. The data is reproduced from the group of the memory cells while compensating for the read threshold that is set in the restricted range.

Abstract translation: 一种方法包括执行使用至少一个读取阈值从一组模拟存储器单元读取数据的读取操作，以产生读出结果。 检测到读取阈值被设置在导致读出结果不反映读取阈值的限制范围内。 在对限制范围内设定的读取阈值进行补偿的同时，从存储单元组再现数据。

公开(公告)号：US20250130725A1

公开(公告)日：2025-04-24

申请号：US18422007

申请日：2024-01-25

Applicant: Apple Inc.

Inventor： Amit Pinchas Aylon ,  Yonathan Tate ,  Alex Radinski ,  Itay Sagron

IPC: G06F3/06

Abstract: A storage system includes circuitry and multiple memory cells. The memory cells are arranged in multiple Word Lines (WLs), including a target WL. The circuitry includes combinational logic implemented in hardware, the circuitry configured to: read a page from a group of target memory cells in the target WL multiple times to produce multiple respective target binary readouts, read a group of neighbor memory cells in a WL neighboring to the target WL so as to produce a single neighbor binary readout, apply the combinational logic to both the target binary readouts and the neighbor binary readout to produce (i) output bits of the page, and (ii) respective binary confidence levels associated with the output bits, and transmit the output bits and the binary confidence levels to a controller.

公开(公告)号：US20170011803A1

公开(公告)日：2017-01-12

申请号：US14794862

申请日：2015-07-09

Applicant: APPLE INC.

Inventor： Barak Baum ,  Alex Radinski ,  Eyal Gurgi ,  Naftali Sommer ,  Tsafrir Kamelo

IPC: G11C16/26 ,  G11C16/08 ,  G11C29/52 ,  G06F11/07 ,  G06F11/10 ,  G11C11/56 ,  G11C16/10

CPC classification number: G11C16/10 ,  G06F11/1012 ,  G11C7/14 ,  G11C11/56 ,  G11C11/5628 ,  G11C11/5642 ,  G11C16/26 ,  G11C16/28 ,  G11C16/3418 ,  G11C16/3459 ,  G11C27/005 ,  G11C29/021 ,  G11C29/028 ,  G11C29/42 ,  G11C2029/0409

Abstract: A method includes storing data in memory cells by programming the memory cells with respective values. The memory cells are read in multiple readout operations that each compares the programmed values to at least first and second read thresholds, while keeping the first read threshold fixed throughout the readout operations and perturbing only the second read threshold between the readout operations. A preferred value for the second read threshold is estimated based on the multiple readout operations.

Abstract translation: 一种方法包括通过用相应的值编程存储器单元来将数据存储在存储器单元中。 在多个读出操作中读取存储器单元，每个读出操作将编程值与至少第一和第二读取阈值进行比较，同时在整个读出操作期间保持第一读取阈值并且仅扰乱读出操作之间的第二读取阈值。 基于多个读出操作来估计第二读取阈值的优选值。

公开(公告)号：US20160092372A1

公开(公告)日：2016-03-31

申请号：US14499286

申请日：2014-09-29

Applicant: APPLE INC.

Inventor： Alex Radinski ,  Tsafrir Kamelo

IPC: G06F12/12

CPC classification number: G06F12/121 ,  G06F12/0868 ,  G06F2212/1021 ,  G06F2212/1024 ,  G06F2212/1028 ,  G06F2212/214 ,  G06F2212/312 ,  G11C11/5642 ,  G11C2211/5641 ,  Y02D10/13

Abstract: A method includes reading memory pages from a non-volatile memory that holds at least first memory pages having a first bit significance and second memory pages having a second bit significance, different from the first bit significance. At least some of the read memory pages are cached in a cache memory. One or more of the cached memory pages are selected for eviction from the cache memory, in accordance with a selection criterion that gives eviction preference to the memory pages of the second bit significance over the memory pages of the first bit significance. The selected memory pages are evicted from the cache memory.

Abstract translation: 一种方法包括从非易失性存储器读取存储器页面，该存储器页面至少保存具有第一位重要性的第一存储器页面和不同于第一位重要性的具有第二位重要性的第二存储器页面。 至少一些读取的存储器页面被缓存在高速缓冲存储器中。 根据对第一位有效位的存储器页上的第二位有效位的存储器页进行逐出偏好的选择标准，选择一个或多个高速缓冲存储器页面用于从高速缓冲存储器进行驱逐。 所选存储器页被从缓存存储器中逐出。