公开(公告)号：US11843413B1

公开(公告)日：2023-12-12

申请号：US17707778

申请日：2022-03-29

Applicant: Apple Inc.

Inventor： Long Kong ,  Chia-Hsiang Chen ,  Utku Seckin

IPC: H04B1/7163 ,  H04B1/717

CPC classification number: H04B1/71635 ,  H04B1/7172 ,  H04B2201/7163

Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.

公开(公告)号：US20240235607A9

公开(公告)日：2024-07-11

申请号：US18500959

申请日：2023-11-02

Applicant: Apple Inc.

Inventor： Long Kong ,  Chia-Hsiang Chen ,  Utku Seckin

IPC: H04B1/7163 ,  H04B1/717

CPC classification number: H04B1/71635 ,  H04B1/7172 ,  H04B2201/7163

Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.

公开(公告)号：US11762490B1

公开(公告)日：2023-09-19

申请号：US17407702

申请日：2021-08-20

Applicant: Apple Inc.

Inventor： Kyounghwan Kim ,  Abbas Jamshidi Roudbari ,  Chia-Hsiang Chen ,  Chien-Ya Lee ,  Ching-Sang Chuang ,  Jae Won Choi ,  Jonathan H. Beck ,  Ming E. Tai ,  Warren S. Rieutort-Louis ,  Wen-I Hsieh ,  Yuchi Che

IPC: G06F3/044 ,  G06F3/041 ,  H10K59/40 ,  H10K59/50

CPC classification number: G06F3/0412 ,  H10K59/40 ,  H10K59/50 ,  G06F3/044

Abstract: An electronic device may have a display with an active area configured to display images and an inactive area that is free of pixels and that does not display images. Touch sensor sense lines may have portions located in the active area and portions located in the inactive area. The active and inactive areas may be characterized by respective reflectivity values. To match the reflectivities of the active and inactive areas and thereby avoid undesired visually distinguishable differences in the appearances of these areas, the touch sensor circuitry in the inactive areas may be configured to match the reflectivity values of the active and inactive areas. Sense line portions in the inactive area may have metal traces of enhanced reflectivity and/or uneven surface topology to enhance ambient light reflections through a circular polarizer that overlaps the active and inactive areas.

公开(公告)号：US20240137067A1

公开(公告)日：2024-04-25

申请号：US18500959

申请日：2023-11-01

Applicant: Apple Inc.

Inventor： Long Kong ,  Chia-Hsiang Chen ,  Utku Seckin

IPC: H04B1/7163 ,  H04B1/717

CPC classification number: H04B1/71635 ,  H04B1/7172 ,  H04B2201/7163

Abstract: A signal transmitter may include a waveform synthesis circuit and a signal transmission circuit. The waveform synthesis circuit may store values of a reference waveform for a selected channel of the signal transmitter, and use the stored values to generate values of reference waveforms for one or more other channels of the signal transmitter. The waveform synthesis circuit may further include a sampling boost circuit to generate one or more additional values for the reference waveforms. The waveform transmission circuit may generate signals for the channels of the signal transmitter based at least in part on the values of the reference waveforms, and transmit the signals via one or more antennas.

公开(公告)号：US20230344614A1

公开(公告)日：2023-10-26

申请号：US18312279

申请日：2023-05-04

Applicant: Apple Inc.

Inventor： Feng Xue ,  Yang-Seok Choi ,  Daniel Schwartz ,  Shu-Ping Yeh ,  Namyoon Lee ,  Venkatesan Nallampatti Ekambaram ,  Ching-En Lee ,  Chia-Hsiang Chen

IPC: H04L5/14 ,  H04B1/525 ,  H04B1/44 ,  H04B15/00 ,  H04B1/48 ,  H04B7/0413

CPC classification number: H04L5/1461 ,  H04B1/525 ,  H04B1/44 ,  H04B15/00 ,  H04B1/48 ,  H04B7/0413

Abstract: A communication circuit arrangement includes a signal path circuit to estimate, using a first kernel dimension filter and a first delay tap dimension filter, a first interference signal produced by a first amplifier. The signal path circuit further estimates, using a second kernel dimension filter and a second delay tap dimension filter, a second interference signal produced by a second amplifier. A cancellation circuit of the communication circuit arrangement may subtract a combination of the first interference signal and the second interference signal from a received signal to obtain a filtered signal, and one or more filter adaptation circuits may alternate between a kernel update phase and a delay update phase to update the first kernel dimension filter and the second kernel dimension filter during the kernel update phase, and update the first delay tap dimension filter and the second delay tap dimension filter during the delay update phase.

公开(公告)号：US11671235B2

公开(公告)日：2023-06-06

申请号：US16327386

申请日：2016-09-29

Applicant: Apple Inc.

Inventor： Feng Xue ,  Yang-Seok Choi ,  Daniel Schwartz ,  Shu-Ping Yeh ,  Namyoon Lee ,  Venkatesan Nallampatti Ekambaram ,  Ching-En Lee ,  Chia-Hsiang Chen

IPC: H04L5/14 ,  H04B1/44 ,  H04B1/48 ,  H04B1/525 ,  H04B7/0413 ,  H04B15/00

CPC classification number: H04L5/1461 ,  H04B1/44 ,  H04B1/48 ,  H04B1/525 ,  H04B7/0413 ,  H04B15/00

Abstract: A communication circuit arrangement includes a first kernel dimension filter circuit configured to apply a first kernel dimension filter to a first input signal to estimate a first kernel dimension interference signal from a first amplifier, a second kernel dimension filter circuit configured to apply a second kernel dimension filter to a second input signal to estimate a second kernel dimension interference signal from a second amplifier, a joint delay tap dimension filter configured to apply a joint delay tap dimension filter to a combination of the first kernel dimension interference signal and the second kernel dimension interference signal to obtain an estimated joint interference signal, and a cancelation circuit configured to remove the estimated joint interference signal from a received signal to obtain a clean signal.