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1.发明申请A ROBUST MECHANISM FOR ADAPTIVE POWER CONSERVATION IN SOLID-STATE DEVICES 审中-公开一种在固态设备中自适应功率保存的稳定机制
公开(公告)号：WO2017030871A1
公开(公告)日：2017-02-23
申请号：PCT/US2016/046365
申请日：2016-08-10
Applicant: APPLE INC.
Inventor： ADAVI, Bhaskar R. , SARCONE, Christopher J. , RADHAKRISHNAN, Manoj K.
CPC classification number: G06F3/06 , G06F1/3225 , G06F1/3268 , G06F1/3275 , Y02D10/14 , Y02D10/154
Abstract: Disclosed herein is a technique for dynamically scaling a low-power self-refresh (LPSR) idle interval associated with a solid state drive (SSD) of a user device in order to promote enhanced battery life efficiency within the user device. A determination can be made regarding whether the LPSR idle interval is to be scaled up or scaled down. Specifically, the determination is based on a total elapsed since the user device was first powered on and a total number of LPSR transitions or cycles that have been performed in association with the SSD. In turn, the dynamic scaling of the LPSR idle intervals causes NAND power-cycles to be consumed responsibly over an average system lifetime of the user device, which can result in better power management at the user device.
Abstract translation: 本文公开了一种用于动态地缩放与用户设备的固态驱动器（SSD）相关联的低功率自刷新（LPSR）空闲间隔的技术，以便在用户设备内促进增强的电池寿命效率。 可以确定LPSR空闲间隔是放大还是缩小。 具体地，该确定基于从用户设备第一次通电开始的总经过量以及已经与SSD相关联地执行的LPSR转换或周期的总数。 反过来，LPSR空闲间隔的动态缩放导致NAND功率周期在用户设备的平均系统寿命内被负责地消耗，这可以导致用户设备的更好的功率管理。
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2.发明申请USING STORAGE CONTROLLER BUS INTERFACES TO SECURE DATA TRANSFER BETWEEN STORAGE DEVICES AND HOSTS 审中-公开使用存储控制器总线接口来保护存储设备和主机之间的数据传输
公开(公告)号：WO2013130632A1
公开(公告)日：2013-09-06
申请号：PCT/US2013/028053
申请日：2013-02-27
Applicant: APPLE INC.
Inventor： SARCONE, Christopher J.
IPC: G06F21/85
CPC classification number: G06F21/85
Abstract: The disclosed embodiments provide a system that secures data transfer between a storage device and a host. During operation, the system obtains an input/output (I/O) command and an encryption context associated with the I/O command from a device driver executing on the host. Next, the system uses a storage controller bus interface between the host and the storage device to apply the encryption context to data associated with the I/O command, wherein the encryption context enables transmission of an encrypted form of the data between the storage device and the host. Finally, the system uses the storage controller bus interface to issue the I/O command to the storage device, wherein the I/O command is processed by the storage device.
Abstract translation: 所公开的实施例提供了一种确保存储设备和主机之间的数据传输的系统。 在操作期间，系统从主机上执行的设备驱动程序获取与I / O命令相关联的输入/输出（I / O）命令和加密上下文。 接下来，系统使用主机和存储设备之间的存储控制器总线接口将加密上下文应用于与I / O命令相关联的数据，其中加密上下文使得能够在存储设备与存储设备之间传输数据的加密形式 主人。 最后，系统使用存储控制器总线接口向存储设备发出I / O命令，其中I / O命令由存储设备处理。
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Patent Agency Ranking
公开(公告)号：WO2015105721A1
公开(公告)日：2015-07-16
申请号：PCT/US2014/073040
申请日：2014-12-31
Applicant: APPLE INC.
Inventor： SARCONE, Christopher J. , OJALVO, Shai
IPC: G06F12/08
CPC classification number: G06F3/0619 , G06F3/0659 , G06F3/0688 , G06F11/1072 , G06F12/0215 , G06F12/0862 , G06F2212/6028 , G06F2212/654 , G11C29/52 , Y02D10/13
Abstract: A method for data storage, includes holding a definition of a speculative readout mode for readout in a storage device, in which the storage device is requested to read a data unit having a data unit size, and in response the storage device retrieves a storage page that contains the data unit and has a storage page size larger than the data unit size, and retains the storage page in preparation for subsequent requests. Activation of the speculative readout mode is coordinated. A readout command using the speculative readout mode is performed.
Abstract translation: 一种用于数据存储的方法，包括在存储设备中保存用于读出的推测读出模式的定义，其中存储设备被请求读取具有数据单元大小的数据单元，并且响应于存储设备检索存储页面 其包含数据单元并且具有大于数据单元大小的存储页面大小，并且保留存储页面以备以后的请求。 推测读出模式的激活是协调的。 执行使用推测读出模式的读出命令。
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4.发明申请SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST 审中-公开同时进行数据传输和错误控制以减少延迟并改善对主机的影响
公开(公告)号：WO2013033121A1
公开(公告)日：2013-03-07
申请号：PCT/US2012/052713
申请日：2012-08-28
Applicant: APPLE INC. , SARCONE, Christopher J. , CONROY, David G. , KELLER, Jim
Inventor： SARCONE, Christopher J. , CONROY, David G. , KELLER, Jim
IPC: G06F11/10
Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.
Abstract translation: 所公开的实施例提供了将数据从存储设备传送到主机的系统。 该系统包括一个通信机制，其接收从主机读取一组块的请求。 接下来，在从存储装置读取块集合中的每个块时，通信机制通过与主机的接口传送块。 该系统还包括在读取该块时对块执行错误检测的错误检测装置，以及如果在该块中检测到错误则对该块执行错误校正的纠错装置。 然后，在从块中移除错误之后，通信机制可以将块重新传送到主机。
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5.发明公开SIMULTANEOUS DATA TRANSFER AND ERROR CONTROL TO REDUCE LATENCY AND IMPROVE THROUGHPUT TO A HOST 审中-公开同时通信和差错控制以缩短延迟并提高对主机的流量
公开(公告)号：EP2751688A1
公开(公告)日：2014-07-09
申请号：EP12756317.9
申请日：2012-08-28
Applicant: Apple Inc.
Inventor： SARCONE, Christopher J. , CONROY, David G. , KELLER, Jim
IPC: G06F11/10
Abstract: The disclosed embodiments provide a system that transfers data from a storage device to a host. The system includes a communication mechanism that receives a request to read a set of blocks from the host. Next, upon reading each block from the set of blocks from the storage device, the communication mechanism transfers the block over an interface with the host. The system also includes an error-detection apparatus that performs error detection on the block upon reading the block, and an error-correction apparatus that performs error correction on the block if an error is detected in the block. The communication mechanism may then retransfer the block to the host after the error is removed from the block.
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6.发明公开USING STORAGE CONTROLLER BUS INTERFACES TO SECURE DATA TRANSFER BETWEEN STORAGE DEVICES AND HOSTS 审中-公开使用存储控制总线接口，安全之间的数据传输存储器设备和主机
公开(公告)号：EP2803012A1
公开(公告)日：2014-11-19
申请号：EP13710196.0
申请日：2013-02-27
Applicant: Apple Inc.
Inventor： SARCONE, Christopher J.
IPC: G06F21/85
Abstract: The disclosed embodiments provide a system that secures data transfer between a storage device and a host. During operation, the system obtains an input/output (I/O) command and an encryption context associated with the I/O command from a device driver executing on the host. Next, the system uses a storage controller bus interface between the host and the storage device to apply the encryption context to data associated with the I/O command, wherein the encryption context enables transmission of an encrypted form of the data between the storage device and the host. Finally, the system uses the storage controller bus interface to issue the I/O command to the storage device, wherein the I/O command is processed by the storage device.
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7.发明授权
公开(公告)号：EP2803012B1
公开(公告)日：2020-08-05
申请号：EP13710196.0
申请日：2013-02-27
Applicant: Apple Inc.
Inventor： SARCONE, Christopher J.
IPC: G06F21/85
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