TRANSMIT-RECEIVE SWITCH WITH HARMONIC DISTORTION REJECTION AND ELECTROSTATIC DISCHARGE PROTECTION

    公开(公告)号:US20240356577A1

    公开(公告)日:2024-10-24

    申请号:US18762436

    申请日:2024-07-02

    Applicant: Apple Inc.

    Inventor: Saihua Lin

    CPC classification number: H04B1/48 H04B1/006 H04B1/0064 H04B2001/485

    Abstract: Embodiments disclosed herein relate to reducing insertion loss in a transceiver while improving an operating efficiency of the transceiver. To do so, the transceiver may include isolation circuitry with harmonic distortion rejection circuitry, an electrostatic discharge filter, an out-of-band noise filter, and/or a matching network. In particular, the harmonic distortion rejection circuitry may enable a second harmonic signal to pass from a power amplifier of a transmitter of the transceiver to ground. The electrostatic discharge filter may also provide a path to ground for electrostatic discharge, and the out-of-band noise filter may provide a path to ground for noise signals. The isolation circuitry may substantially remove or decrease interference caused by undesirable signals while reducing a power consumption and thus improving an operating efficiency of the transceiver.

    INDUCTOR WITH EMBEDDED SYMMETRIC RESONANT CIRCUIT

    公开(公告)号:US20220415559A1

    公开(公告)日:2022-12-29

    申请号:US17823756

    申请日:2022-08-31

    Applicant: Apple Inc.

    Abstract: Radio frequency filtering circuitry blocks certain frequencies in an outgoing signal so that the signal may be transmitted over a desired frequency. The radio frequency filtering circuitry includes a first inductor having a first coil and a second inductor coupled to and disposed within the first coil. The second inductor has a second coil and a third coil symmetrical to the second coil. When current is applied to the radio frequency filtering circuitry, the current in the second coil causes a first induced current in the first coil and the current in the third coil causes a second induced current in the first coil, wherein the second induced current is approximately equal in magnitude and opposite in direction to the first induced current. As such, the second induced current may compensate for the first induced current.

    Transmit-receive switch with harmonic distortion rejection and electrostatic discharge protection

    公开(公告)号:US11411596B1

    公开(公告)日:2022-08-09

    申请号:US17328783

    申请日:2021-05-24

    Applicant: Apple Inc.

    Inventor: Saihua Lin

    Abstract: Embodiments disclosed herein relate to reducing insertion loss in a transceiver while improving an operating efficiency of the transceiver. To do so, the transceiver may include isolation circuitry with harmonic distortion rejection circuitry, an electrostatic discharge filter, an out-of-band noise filter, and/or a matching network. In particular, the harmonic distortion rejection circuitry may enable a second harmonic signal to pass from a power amplifier of a transmitter of the transceiver to ground. The electrostatic discharge filter may also provide a path to ground for electrostatic discharge, and the out-of-band noise filter may provide a path to ground for noise signals. The isolation circuitry may substantially remove or decrease interference caused by undesirable signals while reducing a power consumption and thus improving an operating efficiency of the transceiver.

    SENSOR CIRCUIT WITH LEAKAGE-BASED LOCAL OSCILLATOR GENERATION

    公开(公告)号:US20210055402A1

    公开(公告)日:2021-02-25

    申请号:US16549689

    申请日:2019-08-23

    Applicant: Apple Inc.

    Abstract: A sensor circuit included in a computer system may include multiple antennae and transceiver circuits that include transmitter and receiver circuits. A particular transceiver circuit may transmit, via a particular antenna, a transmit signal that is a modulated version of a baseband signal, and generate a leakage signal based on leakage between transmitter and receiver circuits included in the particular transceiver circuit. A different transceiver circuit may generate a received signal using a reflected version of the transmitted signal that is received via a different antenna. An output signal may be generated using the received and leakage signals.

    Triplexer with Transmit/Receive Switch
    7.
    发明申请

    公开(公告)号:US20190305919A1

    公开(公告)日:2019-10-03

    申请号:US15937467

    申请日:2018-03-27

    Applicant: Apple Inc.

    Abstract: A triplexer having integrated switching circuitry is disclosed. In one embodiment, a triplexer is used, in a transmit mode, to combine a clock signal, a control signal, and a modulated (e.g., a radio frequency, or RF) signal into a composite signal for transmission over a transmission line. In a receive mode, the triplexer receives and separates the composite signal into the clock signal, the control signal, and the modulated signal. The triplexer further includes switching circuitry integrated therein. The switching circuitry is operable to switch the triplexer between the transmit and receive modes.

    Wireless circuitry with self-calibrated harmonic rejection mixers

    公开(公告)号:US11824593B2

    公开(公告)日:2023-11-21

    申请号:US17941975

    申请日:2022-09-09

    Applicant: Apple Inc.

    CPC classification number: H04B17/21 H03B5/1829 H04B17/345 H04B2215/065

    Abstract: An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.

    Radio-frequency Power Amplifier with Amplitude Modulation to Amplitude Modulation (AMAM) Compensation

    公开(公告)号:US20230093489A1

    公开(公告)日:2023-03-23

    申请号:US17688652

    申请日:2022-03-07

    Applicant: Apple Inc.

    Inventor: Saihua Lin

    Abstract: An electronic device may include wireless circuitry with a processor, a transceiver, an antenna, and a front-end module coupled between the transceiver and the antenna. The front-end module may include one or more power amplifiers for amplifying a signal for transmission through the antenna. A power amplifier may include an amplitude modulation distortion compensation circuit coupled to the input of the power amplifier. The compensation circuit may include adaptive biasing transistors each having a first source-drain terminal coupled to the input of the power amplifier, a second source-drain terminal coupled to a supply voltage, and a gate terminal configured to receive a control voltage via a big resistor. The control voltage can be set to a voltage level so that the adaptive biasing transistors are only turned on when the voltage swing at the input of the power amplifier is relatively large.

    Wireless circuitry with self-calibrated harmonic rejection mixers

    公开(公告)号:US11296802B1

    公开(公告)日:2022-04-05

    申请号:US17031753

    申请日:2020-09-24

    Applicant: Apple Inc.

    Abstract: An electronic device may include a harmonic rejection mixer with a delay line, mixer array, and load. The delay line may generate LO phases. Each mixer in the array may have a first input that receives an LO phase and a second input coupled to an input switch and the first input of the next mixer circuit through an inter-mixer switch. The load may include a set of switches. In a transmit mode, the input switches and set of switches may be closed while the inter-mixer switches are open. In a self-calibration mode, the input switches and set of switches may be open while the inter-mixer switches are closed. A controller may sweep through phase codes for the programmable delay line while storing a digital output from the load. The controller may calibrate the phase code based on the digital output.

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