公开(公告)号：US20190286369A1

公开(公告)日：2019-09-19

申请号：US16124154

申请日：2018-09-06

Applicant: Apple Inc.

Inventor： Yuhua LIU ,  Andrew W. VOGAN ,  Matthew J. BYOM ,  Alexander PALEY

IPC: G06F3/06

Abstract: Disclosed herein are techniques for reducing write amplification when processing write commands directed to a non-volatile memory. According to some embodiments, the method can include the steps of (1) receiving a first plurality of write commands and a second plurality of write commands, where the first plurality of write commands and the second plurality of write commands are separated by a fence command (2) caching the first plurality of write commands, the second plurality of write commands, and the fence command, and (3) in accordance with the fence command, and in response to identifying that at least one condition is satisfied: (i) issuing the first plurality of write commands to the non-volatile memory, (ii) issuing the second plurality of write commands to the non-volatile memory, and (iii) updating log information to reflect that the first plurality of write commands precede the second plurality of write commands.