公开(公告)号：US11281094B2

公开(公告)日：2022-03-22

申请号：US16192546

申请日：2018-11-15

Applicant: Applied Materials, Inc.

Inventor： Roman Gouk ,  Giback Park ,  Kyuil Cho ,  Han-Wen Chen ,  Chintan Buch ,  Steven Verhaverbeke ,  Vincent Dicaprio

IPC: G03F7/038 ,  G03F7/00 ,  H01L21/768 ,  G03F7/20

Abstract: A method and apparatus for forming a plurality of vias in panels for advanced packaging applications is disclosed, according to one embodiment. A redistribution layer is deposited on a substrate layer. The redistribution layer may be deposited using a spin coating process, a spray coating process, a drop coating process, or lamination. The redistribution layer is then micro-imprinted using a stamp inside a chamber. The redistribution layer and the stamp are then baked inside the chamber. The stamp is removed from the redistribution layer to form a plurality of vias in the redistribution layer. Excess residue built-up on the redistribution layer may be removed using a descumming process. A residual thickness layer disposed between the bottom of each of the plurality of vias and the top of the substrate layer may have thickness of less than about 1 μm.

公开(公告)号：US11927885B2

公开(公告)日：2024-03-12

申请号：US17883422

申请日：2022-08-08

Applicant: Applied Materials, Inc.

Inventor： Roman Gouk ,  Jean Delmas ,  Steven Verhaverbeke ,  Chintan Buch

IPC: G03F7/00 ,  B29C45/37 ,  B29C59/02 ,  B29K23/00 ,  H01L21/027 ,  H01L21/768

CPC classification number: G03F7/0002 ,  B29C45/372 ,  B29C59/022 ,  H01L21/0274 ,  H01L21/76817 ,  B29K2023/16

Abstract: An imprint lithography stamp includes a stamp body having a patterned surface and formed from a fluorinated ethylene propylene copolymer. The imprint lithography stamp further includes a backing plate with a plurality of through-holes with portions of the stamp body extending into the through-holes to adhere the stamp body to the backing plate. The patterned surface of the stamp body has a plurality of protrusions extending from the stamp body, which are used to form high aspect ratio features at high processing temperatures. A mold design for forming the imprint lithography stamp and an injection molding process for forming the imprint lithography stamp are also provided.

公开(公告)号：US11454884B2

公开(公告)日：2022-09-27

申请号：US16849393

申请日：2020-04-15

Applicant: Applied Materials, Inc.

Inventor： Roman Gouk ,  Jean Delmas ,  Steven Verhaverbeke ,  Chintan Buch

IPC: G03F7/00 ,  H01L21/027 ,  H01L21/768

Abstract: An imprint lithography stamp includes a stamp body having a patterned surface and formed from a fluorinated ethylene propylene copolymer. The imprint lithography stamp further includes a backing plate with a plurality of through-holes with portions of the stamp body extending into the through-holes to adhere the stamp body to the backing plate. The patterned surface of the stamp body has a plurality of protrusions extending from the stamp body, which are used to form high aspect ratio features at high processing temperatures. A mold design for forming the imprint lithography stamp and an injection molding process for forming the imprint lithography stamp are also provided.

公开(公告)号：US11388822B2

公开(公告)日：2022-07-12

申请号：US17005954

申请日：2020-08-28

Applicant: Applied Materials, Inc.

Inventor： Tapash Chakraborty ,  Steven Verhaverbeke ,  Han-Wen Chen ,  Chintan Buch ,  Prerna Goradia ,  Giback Park ,  Kyuil Cho

IPC: H05K1/02 ,  H05K3/00 ,  H05K3/06 ,  H05K3/28 ,  H05K3/46 ,  H05K3/38 ,  B32B15/08 ,  B32B7/12

Abstract: Methods for forming circuit boards and circuit boards using an adhesion layer are described. A substrate with two surfaces is exposed to a bifunctional organic compound to form an adhesion layer on the first substrate surface. A resin layer is then deposited on the adhesion layer and the exposed substrate surfaces. Portions of the resin layer may be removed to expose metal pads for contacts.

公开(公告)号：US12087679B2

公开(公告)日：2024-09-10

申请号：US16886704

申请日：2020-05-28

Applicant: Applied Materials, Inc.

Inventor： Han-Wen Chen ,  Steven Verhaverbeke ,  Giback Park ,  Kyuil Cho ,  Kurtis Leschkies ,  Roman Gouk ,  Chintan Buch ,  Vincent Dicaprio ,  Bernhard Stonas ,  Jean Delmas

IPC: H01L23/498 ,  H01L21/48 ,  H01L23/14

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/49866

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

公开(公告)号：US11881447B2

公开(公告)日：2024-01-23

申请号：US17227867

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen Chen ,  Steven Verhaverbeke ,  Giback Park ,  Kyuil Cho ,  Kurtis Leschkies ,  Roman Gouk ,  Chintan Buch ,  Vincent Dicaprio ,  Bernhard Stonas ,  Jean Delmas

IPC: H01L23/538 ,  H01L23/367 ,  H01L23/498 ,  H01L21/48 ,  H01L23/14

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/49866

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

公开(公告)号：US10727083B1

公开(公告)日：2020-07-28

申请号：US16284595

申请日：2019-02-25

Applicant: Applied Materials, Inc.

Inventor： Roman Gouk ,  Chintan Buch ,  Kyuil Cho ,  Han-Wen Chen ,  Steven Verhaverbeke ,  Vincent Dicaprio

IPC: G03F7/00 ,  H01L21/48

Abstract: The present disclosure generally relates to methods of micro-imprinting panels or substrates for advanced packaging applications. A redistribution layer comprising an epoxy material is deposited on a substrate layer and imprinted with a stamp to form an epoxy substrate patterned with a plurality of vias. The stamp is removed from the epoxy substrate, and the epoxy substrate is optionally etched with a plasma comprising oxygen to prevent the redistribution layer from becoming flowable when cured. A capping layer may optionally be deposited on the surface of the epoxy substrate.

公开(公告)号：US11931855B2

公开(公告)日：2024-03-19

申请号：US16885753

申请日：2020-05-28

Applicant: Applied Materials, Inc.

Inventor： Han-Wen Chen ,  Steven Verhaverbeke ,  Tapash Chakraborty ,  Prayudi Lianto ,  Prerna Sonthalia Goradia ,  Giback Park ,  Chintan Buch ,  Pin Gian Gan ,  Alex Hung

IPC: B24B37/04 ,  B24B21/04 ,  B24B37/07 ,  B24B37/14

CPC classification number: B24B37/042 ,  B24B21/04 ,  B24B37/14 ,  B24B37/07

Abstract: Embodiments of the present disclosure generally relate to planarization of surfaces on substrates and on layers formed on substrates. More specifically, embodiments of the present disclosure relate to planarization of surfaces on substrates for advanced packaging applications, such as surfaces of polymeric material layers. In one implementation, the method includes mechanically grinding a substrate surface against a polishing surface in the presence of a grinding slurry during a first polishing process to remove a portion of a material formed on the substrate; and then chemically mechanically polishing the substrate surface against the polishing surface in the presence of a polishing slurry during a second polishing process to reduce any roughness or unevenness caused by the first polishing process.

公开(公告)号：US11862546B2

公开(公告)日：2024-01-02

申请号：US16698680

申请日：2019-11-27

Applicant: Applied Materials, Inc.

Inventor： Han-Wen Chen ,  Steven Verhaverbeke ,  Giback Park ,  Kyuil Cho ,  Kurtis Leschkies ,  Roman Gouk ,  Chintan Buch ,  Vincent Dicaprio

IPC: H01L23/538 ,  H01L23/498 ,  H01L21/48 ,  H01L23/14

CPC classification number: H01L23/49838 ,  H01L21/486 ,  H01L23/147 ,  H01L23/49827 ,  H01L23/49866

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.

公开(公告)号：US11798903B2

公开(公告)日：2023-10-24

申请号：US17725003

申请日：2022-04-20

Applicant: Applied Materials, Inc.

Inventor： Chintan Buch ,  Roman Gouk ,  Steven Verhaverbeke

IPC: H01L23/00

CPC classification number: H01L24/03 ,  H01L24/05 ,  H01L2224/024 ,  H01L2224/0239 ,  H01L2224/02311 ,  H01L2224/02313 ,  H01L2224/02331 ,  H01L2224/02333 ,  H01L2224/02381 ,  H01L2224/0557 ,  H01L2224/05569

Abstract: A method for forming microvias for packaging applications is disclosed. A sacrificial photosensitive material is developed to form microvias with reduced diameter and improved placement accuracy. The microvias are filled with a conductive material and the surrounding dielectric is removed and replaced with an RDL polymer layer.