1.
    发明专利
    未知

    公开(公告)号:NL194380C

    公开(公告)日:2002-02-04

    申请号:NL9302256

    申请日:1993-12-24

    Abstract: A plurality of address wiring layers and a plurality of data wiring layers are arranged to cross each other at a right angle. TFTs are respectively arranged at the intersections between the address wiring layers and the data wiring layers. The gate electrode of each TFT is connected to an address wiring layer for each row. The drain electrode of each TFT is connected to a data wiring layer for each column. Display electrodes are respectively arranged in the regions defined by the address wiring layers and the data wiring layers, and are connected to the source electrodes of the TFTs arranged in the respective regions. The data wiring layers and the source and drain electrodes of the TFTs each comprise the first layer serving as an ohmic barrier layer for a semiconductor layer, the second layer forming of a conductive material and serving as a main signal wiring layer, and the third layer serving as a battery reaction preventing layer.

    3.
    发明专利
    未知

    公开(公告)号:DE60020308D1

    公开(公告)日:2005-06-30

    申请号:DE60020308

    申请日:2000-01-31

    Abstract: A printer head substrate having a silicon substrate on which heat generating elements and partitions are formed and an orifice plate which adhered to the partitions is placed on a stage of a helicon-wave dry etching system. Helicon-wave dry etching is performed while cooling the printer head substrate by allowing a coolant gas to be intervened between the substrate and the stage. This allows multiple orifices of a desired and adequate shape to be simultaneously and quickly bored in the orifice plate even if a thin film sheet having adhesive layers adhered to both sides thereof is used as the orifice plate, thereby improving the working efficiency.

    4.
    发明专利
    未知

    公开(公告)号:NL194380B

    公开(公告)日:2001-10-01

    申请号:NL9302256

    申请日:1993-12-24

    Abstract: A plurality of address wiring layers and a plurality of data wiring layers are arranged to cross each other at a right angle. TFTs are respectively arranged at the intersections between the address wiring layers and the data wiring layers. The gate electrode of each TFT is connected to an address wiring layer for each row. The drain electrode of each TFT is connected to a data wiring layer for each column. Display electrodes are respectively arranged in the regions defined by the address wiring layers and the data wiring layers, and are connected to the source electrodes of the TFTs arranged in the respective regions. The data wiring layers and the source and drain electrodes of the TFTs each comprise the first layer serving as an ohmic barrier layer for a semiconductor layer, the second layer forming of a conductive material and serving as a main signal wiring layer, and the third layer serving as a battery reaction preventing layer.

    6.
    发明专利
    未知

    公开(公告)号:DE60020308T2

    公开(公告)日:2005-11-17

    申请号:DE60020308

    申请日:2000-01-31

    Abstract: A printer head substrate having a silicon substrate on which heat generating elements and partitions are formed and an orifice plate which adhered to the partitions is placed on a stage of a helicon-wave dry etching system. Helicon-wave dry etching is performed while cooling the printer head substrate by allowing a coolant gas to be intervened between the substrate and the stage. This allows multiple orifices of a desired and adequate shape to be simultaneously and quickly bored in the orifice plate even if a thin film sheet having adhesive layers adhered to both sides thereof is used as the orifice plate, thereby improving the working efficiency.

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