公开(公告)号：US20250038130A1

公开(公告)日：2025-01-30

申请号：US18771070

申请日：2024-07-12

Applicant: CHIPBOND TECHNOLOGY CORPORATION

Inventor： Sheng-Han Yang ,  Shih-Chieh Chang

IPC: H01L23/00 ,  H01L23/58

Abstract: A wafer includes chips, a scribe lane, a metal layer and an inhibitor made of a nonconductive material. The metal layer is provided on the scribe lane and the chip located next to the scribe lane. The inhibitor covers the scribe lane and the chip next to the scribe line and includes a first removed part and an inhibition part which are located above a second removed part and a residual part of the metal layer, respectively. The scribe lane, the first and second removed parts are removed, and the inhibition part and the residual part are retained on each of the chips after a wafer cutting process. The inhibitor is provided to prevent the residual part of the metal layer from being lifted up or generating a metal burr during the wafer cutting process.