公开(公告)号：JPH09185361A

公开(公告)日：1997-07-15

申请号：JP31238696

申请日：1996-11-22

Applicant: CIRRUS LOGIC INC

Inventor： EGLIT ALEXANDER J

IPC: G09G5/00 ,  G06T3/40 ,  G09G5/36

Abstract: PROBLEM TO BE SOLVED: To generate accurate pixel data which are scaled up or downsized by providing an interpolator which generates additional pixel data and an overwriting circuit which makes the interpolator generate additional pixel data from adjacent pixel data. SOLUTION: The interpolator 490 can generate additional pixel data by interpolating source video pixel on a current scan line with pixel data received through a line buffer output bus 398. A multiplexer 485 normally outputs pixel data on a previous scan line to an output bus 498, so the interpolator 490 generates additional pixel data from pixel data on the previous scan line. If, however, a slope overload state is present, the interpolator 490 can use >=1 adjacent pixel data instead of the pixel data on the current scan line.

公开(公告)号：JPH09185360A

公开(公告)日：1997-07-15

申请号：JP31238496

申请日：1996-11-22

Applicant: CIRRUS LOGIC INC

Inventor： EGLIT ALEXANDER J

IPC: G09G5/00 ,  G06T3/40 ,  G09G5/36

Abstract: PROBLEM TO BE SOLVED: To prevent a visible artifact corresponding to additional pixel data by providing a 1st circuit which decides conditions where use for interpolation by an interpolator is disabled and a control circuit which makes the interpolator generate one set of additional pixel data. SOLUTION: The graphic controller 220 takes out source video pixel data normally on a current scan line and a previous scan line and interpolates the taken out source video pixel data to generate additional pixels for scaled up video image. Then the graphic controller 220 can decide the source video pixel data on the previous scan line, so if the previous source video pixel data can not be used, additional pixel data can be generated from only the source video pixel data of the current scan line.

公开(公告)号：EP0775975A3

公开(公告)日：1998-06-03

申请号：EP96308452

申请日：1996-11-21

Applicant: CIRRUS LOGIC INC

Inventor： EGLIT ALEXANDER J

IPC: G09G5/00 ,  G06T3/40 ,  G09G5/36

CPC classification number: G06T3/4007

Abstract: A graphics controller circuit for upscaling source video image to generate an upscaled video image. The graphics controller circuit generates additional pixel data for the upscaled video image by interpolating source video pixel data of a one scan line and an another scan line. However, when source video pixel data of the another scan line may not be available for interpolation, the graphics controller circuit generates additional pixel data from source video pixel data of only the one scan line. Source video pixel data of the another scan line may not be available, for example, as a bus that transfers the pixel data may not have sufficient amount of bandwidth.

Abstract translation: 用于放大源视频图像以生成放大视频图像的图形控制器电路。 图形控制器电路通过内插一条扫描线和另一条扫描线的源视频像素数据来产生用于放大视频图像的附加像素数据。 然而，当另一条扫描线的源视频像素数据可能不可用于内插时，图形控制器电路仅从一条扫描线的源视频像素数据生成附加像素数据。 例如，由于传输像素数据的总线可能没有足够的带宽量，所以另一条扫描线的源视频像素数据可能不可用。