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    HIGH EFFICIENCY GRATING COUPLER FOR A LASER SOURCE
    1.
    发明申请
    HIGH EFFICIENCY GRATING COUPLER FOR A LASER SOURCE 审中-公开

    公开(公告)号：WO2023069859A1

    公开(公告)日：2023-04-27

    申请号：PCT/US2022/078040

    申请日：2022-10-13

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： ONG, Eng Wen ,  WEBSTER, Mark A.

    IPC: G02B6/42

    Abstract: A grating coupler (300) with a wafer bonded configuration includes: a substrate (310); an oxide layer (240) disposed on the substrate (310); a silicon nitride layer (230) disposed above the oxide layer (240); a first silicon layer (250) disposed above the silicon nitride layer (230); a second silicon layer (260) disposed above the first silicon layer (250); and a bi-layer grating (370) disposed above the silicon nitride layer (230). The bi-layer grating (370) includes (i) a first etched layer of the first silicon layer (250) and (ii) a second etched layer of the second silicon layer (260).

    CASCADED ARRANGEMENT OF TWO-MODE BRAGG GRATINGS IN MULTIPLEXING APPLICATIONS
    2.
    发明申请
    CASCADED ARRANGEMENT OF TWO-MODE BRAGG GRATINGS IN MULTIPLEXING APPLICATIONS 审中-公开

    公开(公告)号：WO2021184042A1

    公开(公告)日：2021-09-16

    申请号：PCT/US2021/070258

    申请日：2021-03-10

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： LING, Tao ,  LEE, Yi Ho ,  TUMMIDI, Ravi S. ,  WEBSTER, Mark A.

    IPC: H04J14/02 ,  G02B6/293

    Abstract: Aspects described herein include an optical apparatus comprising an input port configured to receive an optical signal comprising a plurality of wavelengths, and a plurality of output ports. Each output port is configured to output a respective wavelength of the plurality of wavelengths. The optical apparatus further comprises a first plurality of two-mode Bragg gratings in a cascaded arrangement. Each grating of the first plurality of two-mode Bragg gratings is configured to reflect a respective wavelength of the plurality of wavelengths toward a respective output port of the plurality of output ports, and transmit any remaining wavelengths of the plurality of wavelengths.

    FABRICATION-TOLERANT ON-CHIP PASSIVE MULTIPLEXERS AND DEMULTIPLEXERS
    3.
    发明申请
    FABRICATION-TOLERANT ON-CHIP PASSIVE MULTIPLEXERS AND DEMULTIPLEXERS 审中-公开

    公开(公告)号：WO2023069830A1

    公开(公告)日：2023-04-27

    申请号：PCT/US2022/077258

    申请日：2022-09-29

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： LEE, Yi Ho ,  LING, Tao ,  TUMMIDI, Ravi S. ,  WEBSTER, Mark A. ,  GOTHOSKAR, Prakash B.

    IPC: H04J14/02 ,  G02B6/12 ,  G02B6/293

    Abstract: Fabrication-tolerant on-chip multiplexers and demultiplexers are provides via a lattice filter interleaver configured to receive an input signal including a plurality of individual signals and to produce a first interleaved signal with a first subset of the plurality of individual signals and a second interleaved signal with a second subset of the plurality of individual signals; a first Bragg interleaver configured to receive the first interleaved signal and produce a first output signal including a first individual signal of the plurality of individual signals and a second output signal including a second individual signal of the plurality of individual signals; and a second Bragg interleaver configured to receive the second interleaved signal and produce a third output signal including a third individual signal of the plurality of individual signals and a fourth output signal including a fourth individual signal of the plurality of individual signals.

    OPTICAL MODULATOR WITH REGION EPITAXIALLY RE-GROWN OVER POLYCRYSTALLINE SILICON
    4.
    发明申请
    OPTICAL MODULATOR WITH REGION EPITAXIALLY RE-GROWN OVER POLYCRYSTALLINE SILICON 审中-公开

    公开(公告)号：WO2020185795A1

    公开(公告)日：2020-09-17

    申请号：PCT/US2020/021915

    申请日：2020-03-10

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： VERT, Alexey V. ,  WEBSTER, Mark A.

    IPC: G02F1/025

    Abstract: Embodiments provide for an optical modulator that includes a first silicon region, a polycrystalline silicon region; a gate oxide region joining the first silicon region to a first side of the polycrystalline region; and a second silicon region formed on a second side of the polycrystalline silicon region opposite to the first side, thereby defining an active region of an optical modulator between the first silicon region, the polycrystalline region, the gate oxide region, and the second silicon region. The polycrystalline silicon region may be between 0 and 60 nanometers thick, and may be formed or patterned to the desired thickness. The second silicon region may be epitaxially grown from the polycrystalline silicon region and patterned into a desired cross sectional shape separately from or in combination with the polycrystalline silicon region.

    EXTINCTION RATIO IMPROVEMENTS IN SILICON PHOTONICS
    5.
    发明申请
    EXTINCTION RATIO IMPROVEMENTS IN SILICON PHOTONICS 审中-公开

    公开(公告)号：WO2020006140A1

    公开(公告)日：2020-01-02

    申请号：PCT/US2019/039337

    申请日：2019-06-26

    Applicant: CISCO TECHNOLOGY, INC.

    Inventor： ANDERSON, Sean P. ,  WEBSTER, Mark A.

    IPC: H04B10/50 ,  G02F1/21 ,  G02F1/225 ,  H04B10/54

    Abstract: Improvements in extinguishing optical signals in silicon photonics may be achieved by supplying a test signal of a known characteristics to a Photonic Element (PE) to extinguish the test signal via a first phase shifter and intensity modulator on a first arm of the PE and a second phase shifter and intensity modulator on a second arm of the PE; sweeping through a plurality of voltages at the first intensity modulator to identify a first voltage that is associated with an extinction ratio at an output of the PE that satisfies an induced loss threshold and a second voltage that is associated with an induced loss in the test signal at the output of the PE that satisfies an extinction ratio threshold; and setting the PE to provide an operational voltage to the first intensity modulator based on the first voltage and the second voltage.

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