-
公开(公告)号：CA2127370C
公开(公告)日：1999-02-23
申请号：CA2127370
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS MICHAEL , EBERST JOHN VERNON , FONTENOT DARWIN , PYRA RICHARD LYNN , WELKER MARK WILLIAM , WOOD PAUL BERTON , BRESENHAM JACK E
Abstract: Line draw circuitry receives parameters defining first and second endpoints of a line and calculates line parameters based on the first and second endpoints. The line parameters may be modified prior to drawing a line based on the calculated and modified parameters.
-
公开(公告)号：AT137040T
公开(公告)日：1996-05-15
申请号：AT93904597
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS M , EBERST JOHN V , FONTENOT DARWIN , PYRA RICHARD L , WELKER MARK W , WOOD PAUL B , BRESENHAM JACK E
Abstract: Line draw circuitry receives parameters defining first and second endpoints of a line and calculates line parameters based on the first and second endpoints. The line parameters are then stored in a memory. A "calculate-only" control signals determines whether a line is drawn immediately after calculation (and storing) of the end parameters or whether the line is drawn responsive to a subsequent "start" signal. If the line is to be drawn responsive to the start signal, the line parameters may be modified prior to drawing the line.
-
公开(公告)号：AU3590593A
公开(公告)日：1993-08-03
申请号：AU3590593
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS M , EBERST JOHN V , FONTENOT DARWIN , PYRA RICHARD L , WELKER MARK W , WOOD PAUL B , BRESENHAM JACK E
Abstract: Line draw circuitry receives parameters defining first and second endpoints of a line and calculates line parameters based on the first and second endpoints. The line parameters are then stored in a memory. A "calculate-only" control signals determines whether a line is drawn immediately after calculation (and storing) of the end parameters or whether the line is drawn responsive to a subsequent "start" signal. If the line is to be drawn responsive to the start signal, the line parameters may be modified prior to drawing the line.
-
Patent Agency Ranking
公开(公告)号：AT154714T
公开(公告)日：1997-07-15
申请号：AT93903661
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS M , EBERST JOHN V , FONTENOT DARWIN , PYRA RICHARD L , WELKER MARK W , WOOD PAUL B , BRESENHAM JACK E
Abstract: Circuitry for drawing lines includes a video memory for storing pixel data and circuitry for generating a sequence of addresses defining a line of pixels in the video memory. A first memory stores a sequence of pattern units corresponding to the generated sequence of addresses. A second memory stores a value indicating a current pattern unit. Writing circuitry writes to the video memory at a generated address responsive to a current pattern unit. A third memory stores a control value which is accessed by update circuitry for updating the second memory to indicate the next pattern unit. The update circuitry may selectively update the second memory to the sequential pattern unit or reset the second memory to a predetermined pattern unit.
-
公开(公告)号：CA2127369A1
公开(公告)日：1993-07-22
申请号：CA2127369
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS M , EBERST JOHN V , FONTENOT DARWIN , PYRA RICHARD L , WELKER MARK W , WOOD PAUL B , BRESENHAM JACK E
Abstract: Circuitry for drawing lines includes a video memory for storing pixel data and circuitry for generating a sequence of addresses defining a line of pixels in the video memory. A first memory stores a sequence of pattern units corresponding to the generated sequence of addresses. A second memory stores a value indicating a current pattern unit. Writing circuitry writes to the video memory at a generated address responsive to a current pattern unit. A third memory stores a control value which is accessed by update circuitry for updating the second memory to indicate the next pattern unit. The update circuitry may selectively update the second memory to the sequential pattern unit or reset the second memory to a predetermined pattern unit.
-
公开(公告)号：AU3483393A
公开(公告)日：1993-08-03
申请号：AU3483393
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS M , EBERST JOHN V , FONTENOT DARWIN , PYRA RICHARD L , WELKER MARK W , WOOD PAUL B , BRESENHAM JACK E
Abstract: Circuitry for drawing lines includes a video memory for storing pixel data and circuitry for generating a sequence of addresses defining a line of pixels in the video memory. A first memory stores a sequence of pattern units corresponding to the generated sequence of addresses. A second memory stores a value indicating a current pattern unit. Writing circuitry writes to the video memory at a generated address responsive to a current pattern unit. A third memory stores a control value which is accessed by update circuitry for updating the second memory to indicate the next pattern unit. The update circuitry may selectively update the second memory to the sequential pattern unit or reset the second memory to a predetermined pattern unit.
-
公开(公告)号：CA2127370A1
公开(公告)日：1993-07-22
申请号：CA2127370
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS M , EBERST JOHN V , FONTENOT DARWIN , PYRA RICHARD L , WELKER MARK W , WOOD PAUL B , BRESENHAM JACK E
Abstract: Line draw circuitry receives parameters defining first and second endpoints of a line and calculates line parameters based on the first and second endpoints. The line parameters are then stored in a memory. A "calculate-only" control signals determines whether a line is drawn immediately after calculation (and storing) of the end parameters or whether the line is drawn responsive to a subsequent "start" signal. If the line is to be drawn responsive to the start signal, the line parameters may be modified prior to drawing the line.
-
公开(公告)号：CA2127369C
公开(公告)日：1999-02-23
申请号：CA2127369
申请日：1993-01-13
Applicant: COMPAQ COMPUTER CORP
Inventor： ALBERS THOMAS MICHAEL , EBERST JOHN VERNON , FONTENOT DARWIN , WOOD PAUL BERTON , PYRA RICHARD LYNN , WELKER MARK WILLIAM , BRESENHAM JACK E
Abstract: Circuitry for drawing lines includes a video memory for storing pixel data and c ircuitry for generating a sequence of addresses defining a line of pixels in the video memory. A first memory stores a sequence of pattern units corresponding to the generated sequence of addresses. A second memory stores a value indicating a cur rent pattern unit. Writing circuitry writes to the video memory at a generated address responsive to a current pattern unit. A thir d memory stores a control value which is accessed by update circuitry for updating the second memory to indicate the next pattern unit. The update circuitry may selectively update the second memory to the sequential pattern unit or reset the second memo ry to a predetermined pattern unit.
-
-
-
-
-
-
-
Search Results
8
records
(took 0.022 seconds)
