公开(公告)号：DE69732086T2

公开(公告)日：2005-06-09

申请号：DE69732086

申请日：1997-12-30

Applicant: COMPAQ COMPUTER CORP

Inventor： MAYER DALE J ,  RICHTER ROGER ,  WITKOWSKI MICHAEL L ,  KOTZUR GARY B ,  HARESKI PATRICIA E ,  WALKER WILLIAM J

IPC: G06F13/00 ,  H04L12/56 ,  H04L12/28

Abstract: A network switch including a central memory that stores device identification information, port numbers, control information, and packet data received at the ports of the switch. The memory includes a packet section that stores packet data and a device identification section that stores identification entries, where each entry corresponds to a network device coupled to a port of the switch. The switch includes a switch manager to control data flow between the ports and the central memory. Each of the identification entries includes a unique network address to identify one of the network devices and a port number to identify one of the network ports. Each of the identification entries is located within the central memory at a hash address derived by hashing the unique network address. Hash logic receives and hashes each network address to determine a hash address, which is used to access the identification entries. The memory is organized into a chain structure to enable quick access of entries. The switch manager further includes a control memory for storing control registers, including a freepool control register for identifying a freepool chain of memory sectors, a receive control register for identifying a corresponding receive sector chain and a transmit control register for identifying a corresponding transmit packet chain for each of the ports.

公开(公告)号：DE69732086D1

公开(公告)日：2005-02-03

申请号：DE69732086

申请日：1997-12-30

Applicant: COMPAQ COMPUTER CORP

Inventor： MAYER DALE J ,  RICHTER ROGER ,  WITKOWSKI MICHAEL L ,  KOTZUR GARY B ,  HARESKI PATRICIA E ,  WALKER WILLIAM J

IPC: G06F13/00 ,  H04L12/56 ,  H04L12/28

Abstract: A network switch including a central memory that stores device identification information, port numbers, control information, and packet data received at the ports of the switch. The memory includes a packet section that stores packet data and a device identification section that stores identification entries, where each entry corresponds to a network device coupled to a port of the switch. The switch includes a switch manager to control data flow between the ports and the central memory. Each of the identification entries includes a unique network address to identify one of the network devices and a port number to identify one of the network ports. Each of the identification entries is located within the central memory at a hash address derived by hashing the unique network address. Hash logic receives and hashes each network address to determine a hash address, which is used to access the identification entries. The memory is organized into a chain structure to enable quick access of entries. The switch manager further includes a control memory for storing control registers, including a freepool control register for identifying a freepool chain of memory sectors, a receive control register for identifying a corresponding receive sector chain and a transmit control register for identifying a corresponding transmit packet chain for each of the ports.

公开(公告)号：JPH10215282A

公开(公告)日：1998-08-11

申请号：JP36127697

申请日：1997-12-26

Applicant: COMPAQ COMPUTER CORP

Inventor： MAYER DALE J ,  RICHTER ROGER ,  WITKOWSKI MICHAEL L ,  KOTZUR GARY B ,  HARESKI PATRICIA E ,  WALKER WILLIAM J

IPC: G06F13/00 ,  H04L12/56 ,  H04L12/28 ,  H04L12/46

Abstract: PROBLEM TO BE SOLVED: To provide the network switch that attains communication among network devices. SOLUTION: Upon the receipt of data from a network device 106, the network switch 102 stores device identification information to identify the network device, a port number, control information and packet data. The switch includes a switch manager that controls a data flow between a port and a central memory. Each identification entry is arranged in a central memory of a hash address obtained by hashing a definite network address. A hash logic of the switch manager receives each network address to decide the hash address used to access the identification entry and hashes it. The memory is configured to take a chain structure to access an entry quickly.