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    MOLD PACKAGE
    1.
    发明申请
    MOLD PACKAGE 有权
    模具包

    公开(公告)号：US20160293555A1

    公开(公告)日：2016-10-06

    申请号：US15104255

    申请日：2015-01-09

    Applicant: DENSO CORPORATION

    Inventor： Kengo OKA ,  Tetsuto YAMAGISHI

    IPC: H01L23/00 ,  H01L23/31 ,  H01L23/498

    CPC classification number: H01L23/562 ,  H01L23/28 ,  H01L23/3107 ,  H01L23/3114 ,  H01L23/3121 ,  H01L23/3157 ,  H01L23/3185 ,  H01L23/49838 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2924/1815 ,  H01L2924/19105 ,  H05K1/181 ,  H05K3/284 ,  H05K2203/1316 ,  H01L2924/00014

    Abstract: A mold package being a half-mold type includes: a substrate includes a first face and a second face; an electronic component that is mounted on the first face; and a mold resin that is provided on the first face and seals the first face with the electronic component. The second face is exposed from the mold resin. The mold resin is disposed on the first face so as to seal a sealed portion and to expose a remaining part of the first face as an exposure portion. One side face is provided by an end side face. One side face is provided by a boundary side face. At least a site on a lower end of the boundary side face is provided by an inclined face. In the boundary side face, a site on an upper end side is provided by an other inclined face having a second inclination angle.

    Abstract translation: 一种半模式的模具包装包括：基底，包括第一面和第二面; 电子部件，其安装在所述第一面上; 以及模具树脂，其设置在所述第一面上并且将所述第一面与所述电子部件密封。 第二面从模塑树脂露出。 模塑树脂设置在第一面上，以密封密封部分，并将第一面的剩余部分暴露为曝光部分。 一个侧面由端侧面提供。 一个侧面由边界侧面提供。 边界面的下端的至少一个位置由倾斜面提供。 在边界侧面，上端侧的位置由具有第二倾斜角度的另一倾斜面设置。

    MOLD PACKAGE AND MANUFACTURING METHOD THEREOF
    2.
    发明申请
    MOLD PACKAGE AND MANUFACTURING METHOD THEREOF 有权
    模具包装及其制造方法

    公开(公告)号：US20160133539A1

    公开(公告)日：2016-05-12

    申请号：US14893987

    申请日：2014-05-29

    Applicant: DENSO CORPORATION

    Inventor： Kengo OKA ,  Yuki SANADA ,  Masayuki TAKENAKA ,  Shinya UCHIBORI ,  Tasuke FUKUDA

    IPC: H01L23/31 ,  H01L23/498 ,  H01L21/56

    CPC classification number: H01L23/3121 ,  H01L21/565 ,  H01L23/3135 ,  H01L23/49838 ,  H01L2224/48091 ,  H01L2224/49175 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012

    Abstract: A mold package includes a substrate having a first surface and a second surface disposed opposite to the first surface, a wiring part disposed on the first surface in protruded manner, a molding resin, and a resin film. The molding resin partially seals the first surface of the substrate and the wiring part and intersects with the wiring part. The resin film is disposed between the first surface of the substrate and the end of the molding resin, and seals the wiring part and the first surface of the substrate adjacent to the wiring part. The resin film includes a first portion disposed inside the molding resin and a second portion disposed outside the molding resin. An upper surface of the second portion is lower than an upper surface of the first portion and has less uneven portions than the upper surface of the first portion.

    Abstract translation: 模具包装体包括具有第一表面和与第一表面相对设置的第二表面的基板，以突出方式布置在第一表面上的布线部分，模塑树脂和树脂膜。 模制树脂部分地密封基板的第一表面和布线部分，并与布线部分相交。 树脂膜设置在基板的第一表面和模制树脂的端部之间，并且密封布线部分和邻近布线部分的基板的第一表面。 树脂膜包括设置在模制树脂内部的第一部分和设置在模制树脂外部的第二部分。 第二部分的上表面比第一部分的上表面低，并且具有比第一部分的上表面少的凹凸部分。

    SEMICONDUCTOR DEVICE
    3.
    发明申请
    SEMICONDUCTOR DEVICE 有权

    公开(公告)号：US20220223544A1

    公开(公告)日：2022-07-14

    申请号：US17708525

    申请日：2022-03-30

    Applicant: DENSO CORPORATION

    Inventor： Daisuke FUKUOKA ,  Tomomi OKUMURA ,  Yuuji OOTANI ,  Wataru KOBAYASHI ,  Takumi NOMURA ,  Tomoaki MITSUNAGA ,  Takahiro HIRANO ,  Takamichi SAKAI ,  Kengo OKA

    IPC: H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L21/48

    Abstract: In a semiconductor device, a semiconductor element has a front electrode and a back electrode. The back electrode is connected to a wiring member through a bonding member. Wire pieces are disposed in the bonding member, and bonded to a bonding surface of the wiring member to protrude toward the semiconductor element. The bonding member has, in a plan view, a central region that overlaps with a central portion of the semiconductor element including an element center, and an outer peripheral region that includes a portion overlapping with an outer peripheral portion of the semiconductor element surrounding the central portion and surrounds the central region. At least four wire pieces are disposed in the outer peripheral region at positions corresponding to at least four respective corners of the semiconductor element. At least one wire piece is disposed to extend toward the element center in the plan view.

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