公开(公告)号：GB765472A

公开(公告)日：1957-01-09

申请号：GB183454

申请日：1954-01-21

Applicant: DEREK ALFRED LEVELL

Inventor： LEVELL DEREK ALFRED ,  WHITELEY JOSEPH WILLIAM

IPC: H03K3/16

Abstract: 765,472. Pulse generator circuits. LEVELL, D. A. Jan. 7, 1955 [Jan. 21, 1954], No. 1834/54. Class 40(6) The amplitude of a pulse generated by a blocking oscillator circuit is maintained substantially constant by applying to an electrode of the blocking oscillator tube when the predetermined amplitude is attained a voltage which maintains the current in the tube substantially constant. The Figure shows a blocking oscillator circuit of which the pulses generated have their duration maintained constant by delay line 18. The blocking oscillator tube 12 has trigger impulses applied to its control grid from terminal 10 via diode 11 the negative swing of the grid being limited by diode 20. Tube 25 is normally cut off by the negative voltage applied to its control grid from terminal 31. When a positive trigger impulse is applied at input 10 the blocking oscillator tube 12 is cut off, the anode voltage goes negative and due to the action of transformer 13 a positive pulse is generated at terminal 24 and is ultimately terminated by reflection of a negative pulse to the control grid of tube 12 from the end of delay line 18. If the positive pulse at output 24 tends to increase in amplitude a positive voltage is applied via frequency compensated attenuated circuits 26, 28, 27, 29 to the control grid of pentode 25, the resulting negative voltage at its anode being applied to the screen grid of blocking oscillator tube 12 to maintain the current in this tube constant. Thus any tendency for the pulse at output 24 to change in amplitude is compensated by the feed-back circuit comprising pentode 25. If it is required to change the amplitude of the output pulse at 24 whilst maintaining a substantially constant duration this may be effected by adjusting the setting of potentiometer 30.

公开(公告)号：US3667067A

公开(公告)日：1972-05-30

申请号：US3667067D

申请日：1971-03-18

Applicant: DEREK ALFRED LEVELL

Inventor： LEVELL DEREK ALFRED

IPC: H03B1/00 ,  H03B5/24 ,  H03F1/44 ,  H03F3/191 ,  H03B5/20

CPC classification number: H03B5/24 ,  H03B2201/01 ,  H03F3/191

Abstract: An electronic circuit has two similar phase shift networks connected in cascade between a circuit input and the input of an amplifier providing a 180* phase-shift between its input and output. The output of the amplifier and first network are combined and the combination applied to the circuit output, providing an overall frequency response exhibiting a resonant frequency. The networks may be connected together via a buffer amplifier, and each comprises a resistance and a reactance interconnected to provide a phase lead or lag. The resonant frequency may be varied by varying the gain of the amplifier or the resistance or reactance of one or both networks. Variable gain feedback circuitry may be connected between the circuit output and input, so that the circuit is selectively operable as a frequency selective amplifier or oscillator in accordance with the gain of this circuitry.

Abstract translation: 电子电路具有两个类似的相移网络，其级联连接在电路输入端和放大器的输入端之间，其输入和输出之间提供180°的相移。 放大器和第一网络的输出被组合，并且将该组合应用于电路输出，提供呈现谐振频率的总体频率响应。 网络可以经由缓冲放大器连接在一起，并且每个都包括互连的电阻和电抗以提供相位超前或滞后。 可以通过改变放大器的增益或一个或两个网络的电阻或电抗来改变谐振频率。 可变增益反馈电路可以连接在电路输出和输入之间，使得电路根据该电路的增益选择性地用作频率选择放大器或振荡器。