公开(公告)号：FI971993A

公开(公告)日：1997-07-09

申请号：FI971993

申请日：1997-05-09

Applicant: DURACELL INC

Inventor： VAN DUONG PHUOC ,  WIECZOREK RUDI ,  ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01M

Abstract: A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.

公开(公告)号：EP0793862A4

公开(公告)日：1999-11-24

申请号：EP95939100

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： VAN DUONG PHUOC ,  WIECZOREK RUDI ,  ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01J7/04

CPC classification number: H01M6/5011 ,  G01R31/3655 ,  G01R31/3658 ,  H01M10/42 ,  H01M10/4257 ,  H01M10/44 ,  H02J7/0003 ,  H02J7/0004 ,  H02J7/0011 ,  H02J9/061 ,  Y10S320/13

Abstract: A smart battery device (10) which provides electrical power and which reports predefined battery parameters to an external device having a power management system, includes: at least one rechargeable cell (26) connected to a pair of terminals (31 and 32) to provide electrical power to an external device (28) during a discharge mode, and to receive electrical power during a charge mode, as provided or determined by remote device (28); a data bus for reporting predefined battery identification and charge parameters to the external device; analog devices for generating analog signals representative of battery voltage and current at the terminals, and an analog signal representative of battery temperature at the cell; a hybrid integrated circuit (IC) (32) having a microprocessor (50) for receiving the analog signals and converting them to digital signals representative of battery voltage, current and temperature, and calculating actual charge parameters over time from the digital signals, the calculations including one calculation according to the following algorithm: CAPrem = CAPFC - ΣIdΔtd - ΣIsΔt + Σ⊂cIcΔtc wherein ⊂c is a function of battery current and temperature; and Is is a function of battery temperature and CAPFC. Superimposed on this equation is reset logic, that self corrects the CAPFC with a capacity calculation at each full charge (EOC) and each end of full discharge.

公开(公告)号：MX9703393A

公开(公告)日：1998-04-30

申请号：MX9703393

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： DUONG PHUOC VAN ,  WIECZOREK RUDI ,  ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01J7/04

Abstract: Un dispositivo (10) de batería "inteligente", el cual suministra energía eléctrica informa los parámetros de la batería definidos previamente a un dispositivo externo, que tiene un sistema de control de energía, este dispositivo incluye al menos una celda (26) recargable, conectada a una pareja de terminales (31 y 32), para suministrar energía eléctrica a un dispositivo externo (28) durante el modo de descarga, y para recibir energía eléctrica durante el modo de carga, como es provisto o determinado por un dispositivo remoto (28); un colector de datos para informar la identificacion de la batería, definida previamente, y los parámetros de carga a un dispositivo externo; dispositivos analogicos para generar señales analogicas que representan el voltaje y la corriente de la batería en las terminales, y una señal analogica que representa la temperatura de la batería en la celda; un circuito (IC)(32) integrado híbrido, que tiene un microprocesador (50) para recibir las señales analogicas y convertirlas en señales digitales que representen el voltaje, corriente y temperatura de batería, y calcular los parámetros reales de carga con el tiempo de las señales digitales, estos cálculos incluyen el cálculo de acuerdo con el siguiente algoritmo, donde cc es una funcion de la corriente y temperatura de la batería; e Is es una funcion de la temperatura de la batería y de CAPFC. Sobrepuesta en esta ecuacion está la logica de reajuste, que corrige por sí misma CAPFE con un cálculo de la capacidad en cada carga completa (EO) y cada extremo de descarga completa.

公开(公告)号：CZ139897A3

公开(公告)日：1998-01-14

申请号：CZ139897

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： VAN DUONG PHUOC ,  WIECZOREK RUDI ,  ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01J7/04

Abstract: A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.

公开(公告)号：AU4105596A

公开(公告)日：1996-06-06

申请号：AU4105596

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： DUONG PHUOC VAN ,  WIECZOREK RUDI ,  ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01J7/04

Abstract: A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.

公开(公告)号：ZA9509575B

公开(公告)日：1996-05-27

申请号：ZA9509575

申请日：1995-11-10

Applicant: DURACELL INC

Inventor： DUONG PHUOC VAN ,  ZEISING ELMAR ,  HULL MATTHEW P ,  FRIELD DANIEL D ,  WIECZOREK RUDI ,  HRUSKA LOUIS W ,  TAYLOR ALWYN H

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01M ,  H01J

CPC classification number: H01M6/5011 ,  G01R31/3655 ,  G01R31/3658 ,  H01M10/42 ,  H01M10/4257 ,  H01M10/44 ,  H02J7/0003 ,  H02J7/0004 ,  H02J7/0011 ,  H02J9/061 ,  Y10S320/13

公开(公告)号：BR9509140A

公开(公告)日：1998-07-21

申请号：BR9509140

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D ,  DUONG PHUOC VON ,  WIECZOREK RUDI

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01J7/04

Abstract: A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.

公开(公告)号：ZA959575B

公开(公告)日：1996-05-27

申请号：ZA959575

申请日：1995-11-10

Applicant: DURACELL INC

Inventor： DUONG PHUOC VAN ,  ZEISING ELMAR ,  HULL MATTHEW P ,  FRIELD DANIEL D ,  WIECZOREK RUDI ,  HRUSKA LOUIS W ,  TAYLOR ALWYN H

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01M ,  H01J

Abstract: A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.

公开(公告)号：CA2204268A1

公开(公告)日：1996-05-23

申请号：CA2204268

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： FRIEL DANIEL D ,  TAYLOR ALWYN H ,  VAN DUONG PHUOC ,  WIECZOREK RUDI ,  HULL MATTHEW P ,  ZEISING ELMAR ,  HRUSKA LOUIS W

IPC: H01J7/04 ,  H01M10/44

Abstract: A smart battery device (10) which provides electrical power and which reports predefined battery parameters to an external device having a power management system, includes: at least one rechargeable cell (26) connected to a pair of terminals (31 and 32) to provide electrical power to an external device (28) during a discharge mode, and to receive electrical power during a charge mode, as provided or determined by remote device (28); a data bus for reporting predefined battery identification and charge parameters to the external device; analog devices for generating analog signals representative of battery voltage and current at the terminals, and an analog signal representative of battery temperature at the cell; a hybrid integrated circuit (IC) (32) having a microprocessor (50) for receiving the analog signals and converting them to digital signals representative of battery voltage, current and temperature, and calculating actual charge parameters over time from the digital signals, the calculations including one calculation according to the following algorithm: CAPrem = CAPFC - .SIGMA.Id.DELTA.td - .SIGMA.Is.DELTA.t + .SIGMA.cIc.DELTA.tc wherein c is a function of battery current and temperature; and Is is a function of battery temperature and CAPFC. Superimposed on this equation is reset logic, that self corrects the CAPFC with a capacity calculation at each full charge (EOC) and each end of full discharge.

公开(公告)号：AU705389B2

公开(公告)日：1999-05-20

申请号：AU4105596

申请日：1995-11-08

Applicant: DURACELL INC

Inventor： DUONG PHUOC VAN ,  WIECZOREK RUDI ,  ZEISING ELMAR ,  HRUSKA LOUIS W ,  HULL MATTHEW P ,  TAYLOR ALWYN H ,  FRIEL DANIEL D

IPC: G01R31/36 ,  H01M6/50 ,  H01M10/42 ,  H01M10/44 ,  H02J7/00 ,  H02J7/02 ,  H02J7/04 ,  H02J9/06 ,  H01J7/04

Abstract: A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.