公开(公告)号：EP1705968A2

公开(公告)日：2006-09-27

申请号：EP06075577.4

申请日：2006-03-10

Applicant: Delphi Technologies, Inc.

Inventor： Fairchild, Ray M. ,  Sarma, Dwasasi H. ,  Workman, Derek B. ,  Harshbarger, Daniel R.

IPC: H05K1/14 ,  H05K1/18

CPC classification number: H01L23/142 ,  H01L21/563 ,  H01L23/5385 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15311 ,  H01L2924/30107 ,  H05K1/0306 ,  H05K1/053 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/0212 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An electronic assembly (100) includes a first substrate (102) and a second substrate (122). The first substrate (102) includes a first surface having a first plurality of conductive traces (106) formed on an electrically non-conductive layer (104). The second substrate (122) includes a first surface having a second plurality of conductive traces (126) formed thereon and a second surface having a third plurality of conductive traces (124) formed thereon. A first electronic component (132) is electrically coupled to one or more of the plurality of conductive traces (126) on the first surface of the second substrate (122). At least one of a plurality of conductive interconnects (108) is incorporated within each solder joint that electrically couples one or more of the conductive traces (124) formed on the second surface of the second substrate (122) to one or more of the conductive traces (106) formed on the first substrate (102).

Abstract translation: 电子组件（100）包括第一基板（102）和第二基板（122）。 第一衬底（102）包括具有形成在非导电层（104）上的第一多个导电迹线（106）的第一表面。 第二衬底（122）包括具有形成在其上的第二多个导电迹线（126）的第一表面和在其上形成有第三多个导电迹线（124）的第二表面。 第一电子部件（132）电耦合到第二基板（122）的第一表面上的多个导电迹线（126）中的一个或多个。 多个导电互连件（108）中的至少一个被并入每个焊接接头内，将形成在第二衬底（122）的第二表面上的一个或多个导电迹线（124）电耦合到一个或多个导电 形成在第一基板（102）上的迹线（106）。

公开(公告)号：EP1705968A3

公开(公告)日：2008-06-04

申请号：EP06075577.4

申请日：2006-03-10

Applicant: Delphi Technologies, Inc.

Inventor： Fairchild, Ray M. ,  Sarma, Dwasasi H. ,  Workman, Derek B. ,  Harshbarger, Daniel R.

IPC: H05K1/14 ,  H05K1/18 ,  H01L23/538

CPC classification number: H01L23/142 ,  H01L21/563 ,  H01L23/5385 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/09701 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/15311 ,  H01L2924/30107 ,  H05K1/0306 ,  H05K1/053 ,  H05K1/141 ,  H05K3/284 ,  H05K3/3436 ,  H05K2201/0212 ,  H05K2201/10977 ,  H01L2924/00 ,  H01L2224/0401

Abstract: An electronic assembly (100) includes a first substrate (102) and a second substrate (122). The first substrate (102) includes a first surface having a first plurality of conductive traces (106) formed on an electrically non-conductive layer (104). The second substrate (122) includes a first surface having a second plurality of conductive traces (126) formed thereon and a second surface having a third plurality of conductive traces (124) formed thereon. A first electronic component (132) is electrically coupled to one or more of the plurality of conductive traces (126) on the first surface of the second substrate (122). At least one of a plurality of conductive interconnects (108) is incorporated within each solder joint that electrically couples one or more of the conductive traces (124) formed on the second surface of the second substrate (122) to one or more of the conductive traces (106) formed on the first substrate (102).