公开(公告)号：WO1992001312A1

公开(公告)日：1992-01-23

申请号：PCT/US1991004590

申请日：1991-06-27

Applicant: EASTMAN KODAK COMPANY

Inventor： EASTMAN KODAK COMPANY ,  STEVENS, Eric, Gordon ,  LEE, Teh-Hsuang ,  BURKEY, Bruce, Curtiss

IPC: H01L27/148

CPC classification number: H01L27/14887 ,  H01L27/14806

Abstract: A solid-state image sensor includes a substrate (12) of a semi-conductor material of one conductivity type having a surface. A plurality of spaced, parallel CCDs (18) are in the substrate (12) at the surface (14). Each CCD (18) includes a channel region (24) of the opposite conductivity type in the substrate and a plurality of conductive gates (28, 30; 128, 130) extending across and insulated from the channel region (24). The conductive gates extend laterally across the channel regions of all of the CCDs and divide the channel regions into a plurality of phases and pixels. A drain region (36; 136) of the opposite conductivity type is in the substrate (12) at the surface and extends along the channel region (24) of at least one of the CCDs (18). A separate overflow channel region (38; 138) of the opposite conductivity type is in the substrate at said surface and extends from each of the CCD channel region phases to the adjacent drain region. A separate overflow barrier region (40; 140) of the one conductivity type is in the substrate and extends across an overflow channel region (38; 138) between the CCD channel region (24) and the drain (36; 136) to control the flow of charge carriers from each phase of the CCD channel region to the drain. Each of the CCDs (18) may have a separate drain region (36) or two adjacent CCDs may share a common drain region (136). A CCD barrier region (32; 132) extends across the channel region in each phase. The CCD barrier region (32; 132) contains the same impurity concentration as the overflow-barrier region (40; 140) of its respective phase and may be connected to the overflow-barrier region.

公开(公告)号：WO1990016083A1

公开(公告)日：1990-12-27

申请号：PCT/US1990003212

申请日：1990-06-11

Applicant: EASTMAN KODAK COMPANY

Inventor： EASTMAN KODAK COMPANY ,  LEE, Teh-Hsuang ,  ERHARDT, Herbert, James

IPC: H01L27/148

CPC classification number: H01L27/14887

Abstract: A CCD imager includes a substrate (12) of a semiconductor material having a plurality of photodetectors (16) therein at a top surface (14) thereof and arranged either in a line or in an array of rows and columns. A CCD shift register (18) is in the substrate (12) along but spaced from one side of the line or each column of photodetectors (16). Between each photodetector (16) and its adjacent shift register (18) is an accumulation region (20). A transfer gate (26) is provided between the shift register (18) and its adjacent line or column of accumulation regions (20). A transfer gate (28) is provided between each line or row of photodetectors (16) and the adjacent accumulation regions (20). A first anti-blooming drain region (22) is provided along each line or column of photodetectors (16) on the side of the photodetectors opposite the accumulation regions (20). A separate second anti-blooming drain (24) is provided along a side of each accumulation region (20) in the area of the substrate between the shift register (18) and the photodetectors (16).

公开(公告)号：WO1992010854A1

公开(公告)日：1992-06-25

申请号：PCT/US1991009053

申请日：1991-12-06

Applicant: EASTMAN KODAK COMPANY

Inventor： EASTMAN KODAK COMPANY ,  GABOURY, Michael, Joseph ,  LEE, Teh-Hsuang ,  STEVENS, Eric, Gordon

IPC: H01L27/148

CPC classification number: H01L27/14887

Abstract: In a solid state image sensor, such as a CCD image sensor having lateral antiblooming protection, the level of which is controlled by an overflow gate voltage forming a barrier, the storage of electrons in the photodiode junction region of the sensor is eliminated by removing the barrier and allowing the charge to flow from the sensor's photodiode junctions into the overflow region. The charge flow is then detected as a function of the instantaneous light impinging on the photodiodes. The physical connections of the overflow gates are selected to form zones. Since the charge flow now represents the instantaneous light intensity, higher frequency components are detected than that limited by the sensor sampling rate. An amplifier is connected to sense the charge flow from each zone. With the range of light intensity being large the amplifier is provided with a logarithmic feed back element. This element provides compression of a signal representing the sensed charge flow.

公开(公告)号：WO1991012688A1

公开(公告)日：1991-08-22

申请号：PCT/US1991000785

申请日：1991-02-06

Applicant: EASTMAN KODAK COMPANY

Inventor： EASTMAN KODAK COMPANY ,  LOSEE, David, L. ,  BURKEY, Bruce, C. ,  LEE, Teh-Hsuang

IPC: H04N03/15

CPC classification number: H04N5/3452 ,  H01L27/14831 ,  H04N5/343 ,  H04N5/3728 ,  H04N5/3765

Abstract: An interline transfer type area image sensor is described which can selectively operate in either an interlaced or non-interlaced read-out mode. The sensor includes a plurality of vertical CCD shift registers (11, 21, 31). Each shift register has an ion implanted shift transfer barrier or storage regions (150, 160) such that only one layer of gate electrode (140, 170) is required by each voltage clock, and a structure for selectively applying voltages to the clock lines for alternate rows of one or both of the vertical shift register electrodes.

公开(公告)号：WO1993004477A1

公开(公告)日：1993-03-04

申请号：PCT/US1992006712

申请日：1992-08-12

Applicant: EASTMAN KODAK COMPANY

Inventor： EASTMAN KODAK COMPANY ,  KANNEGUNDLA, Ram ,  LEE, Teh-Hsuang

IPC: G11C19/28

CPC classification number: G11C27/04

Abstract: Clock driving circuitry for a high speed interline transfer CCD imager generates complementary voltage waveforms, each of which shifts from a respective first voltage level to a respective second voltage level once for every line in a frame to empty each of the imager's vertical shift registers in succession and to a respective third voltage level once each frame to charge all of the photodiodes of the imager. In generating one of the complementary waveforms, a positive third voltage level is superimposed upon the waveform through at least one isolation device and a separate switch is provided to discharge the waveform back to the second voltage level. In generating the other of the complementary waveforms, the waveform is switched from the second voltage level to a negative third voltage level and then switched back from the negative third voltage level to the second voltage level. Filtering is provided to remove transients generated by switching the latter wave from the negative third voltage level back to the second voltage level.

公开(公告)号：WO1991003840A1

公开(公告)日：1991-03-21

申请号：PCT/US1990004974

申请日：1990-09-04

Applicant: EASTMAN KODAK COMPANY

Inventor： EASTMAN KODAK COMPANY ,  BURKEY, Bruce ,  CHANG, Wing-Chyi ,  LEE, Teh-Hsuang

IPC: H01L27/148

CPC classification number: H01L27/14831

Abstract: In a CCD in which a pixel is defined by at least two adjacent gate electrodes, voltages are applied to both gate electrodes to simultaneously place both gates of each pixel in the accumulation mode of operation. Preferably one of these voltages is at a higher potential level than the other.

Abstract translation: 在其中由至少两个相邻栅电极限定像素的CCD中，将电压施加到两个栅电极，以将每个像素的两个栅极同时放置在累积工作模式中。 优选地，这些电压中的一个处于比另一个更高的电位水平。

公开(公告)号：EP0491922A1

公开(公告)日：1992-07-01

申请号：EP91913175.0

申请日：1991-06-27

Applicant: EASTMAN KODAK COMPANY

Inventor： STEVENS, Eric, Gordon ,  LEE, Teh-Hsuang ,  BURKEY, Bruce, Curtiss

IPC: H04L27 ,  H01L27 ,  H04N5

CPC classification number: H01L27/14887 ,  H01L27/14806

Abstract: Détecteur d'image à circuits intégrés comprenant un substrat (12) d'un matériau à semi-conducteurs d'un type de conductivité possédant une surface. Une pluralité de dispositifs à couplage de charge (18) espacés se trouvent dans le substrat (12), à la surface (14). Chaque dispositif à couplage de charge (18) comprend une région de canaux (24) d'un type de conductivité opposée à celui du substrat et une pluralité de portes conductrices (28, 30; 128, 130) s'étendant à travers, et isolés de la région de canaux (24). Les portes conductrices s'étendent latéralement à travers les régions de canaux de tous les dispositifs à couplage de charge et divisent les régions de canaux en une pluralité de phases et de pixels. Une région de drain (36; 136) du type de conductivité opposée se trouve dans le subtrat (12), à la surface, et s'étend le long de la région de canaux (24) d'au moins un des dispositifs à couplage de charge (18). Une région de canaux de débordement séparée (38; 138) du type de conductivité opposée se trouve dans le substrat, sur ladite surface, et s'étend de chacune des phases de la région de canaux de dispositifs à couplage de charge jusqu'à la région de drain contiguë. Une région de barrière de débordement séparée (40; 140) du même type de conductivité se trouve dans le substrat et s'étend à travers une région de canaux de débordement (38; 138) entre la région de canaux de dispositifs à couplage de charge (24) et le drain (36; 136) pour commander le flux de porteuses de charge de chaque phase de la région de canaux de dispositifs à couplage de charge jusqu'au drain. Chacun des dispositifs à couplage de charge (18) peut avoir une région de drain séparée (36) ou deux dispositifs à couplage de charge adjacents peuvent partager une région de drain commune (136). Une région de barrière de dispositifs à couplage de charge (32; 132) s'étend à travers la région de canaux dans chaque phase. La région de barrière de dispositifs à couplage de charge (32; 132) contient la même concentration d'impuretés que la région de

公开(公告)号：EP0491922B1

公开(公告)日：1998-12-02

申请号：EP91913175.5

申请日：1991-06-27

Applicant: EASTMAN KODAK COMPANY

Inventor： STEVENS, Eric, Gordon ,  LEE, Teh-Hsuang ,  BURKEY, Bruce, Curtiss

IPC: H01L27/148 ,  H04N5/235

CPC classification number: H01L27/14887 ,  H01L27/14806

公开(公告)号：EP0468034A1

公开(公告)日：1992-01-29

申请号：EP91904596.0

申请日：1991-02-06

Applicant: EASTMAN KODAK COMPANY

Inventor： LOSEE, David, L. ,  BURKEY, Bruce, C. ,  LEE, Teh-Hsuang

IPC: H01L27 ,  H04N3 ,  H04N5

CPC classification number: H04N5/3452 ,  H01L27/14831 ,  H04N5/343 ,  H04N5/3728 ,  H04N5/3765

Abstract: Un détecteur d'images de zone du type à transfert interligne peut fonctionner sélectivement soit dans un mode de sortie entrelacé soit dans un mode de sortie non entrelacé. Le capteur comprend une pluralité de registres à décalage CCD verticaux (11, 21, 31). Chaque registre à décalage possède des régions de stockage ou barrières de transfert à décalage à implantation d'ions (150, 160) de sorte qu'une seule couche d'électrode de porte (140, 170) est nécessaire pour chaque horloge de tension, et une structure d'application sélective de tensions aux lignes d'horloges pour des rangées alternées de l'une ou des deux électrodes de registre à décalages verticaux.

Abstract translation: 行间传输型面型图象传感器被描述，其选择性地可在隔行扫描或非隔行读出模式中任一动作。 该传感器包括垂直CCD移位寄存器复数。 每个移位寄存器具有被每个电压时钟所需的栅电极的仅一层检查离子注入移传递屏障或存储区域一样，和用于选择性地将电压施加到时钟线，用于一个或两个垂直移位的交替的行的结构 电极注册。

公开(公告)号：EP0468034B1

公开(公告)日：1995-12-20

申请号：EP91904596.3

申请日：1991-02-06

Applicant: EASTMAN KODAK COMPANY

Inventor： LOSEE, David, L. ,  BURKEY, Bruce, C. ,  LEE, Teh-Hsuang

IPC: H04N3/15 ,  H01L27/148

CPC classification number: H04N5/3452 ,  H01L27/14831 ,  H04N5/343 ,  H04N5/3728 ,  H04N5/3765

Abstract: An interline transfer type area image sensor is described which can selectively operate in either an interlaced or non-interlaced read-out mode. The sensor includes a plurality of vertical CCD shift registers (11, 21, 31). Each shift register has an ion implanted shift transfer barrier or storage regions (150, 160) such that only one layer of gate electrode (140, 170) is required by each voltage clock, and a structure for selectively applying voltages to the clock lines for alternate rows of one or both of the vertical shift register electrodes.

Abstract translation: 行间传输型面型图象传感器被描述，其选择性地可在隔行扫描或非隔行读出模式中任一动作。 该传感器包括垂直CCD移位寄存器复数。 每个移位寄存器具有被每个电压时钟所需的栅电极的仅一层检查离子注入移传递屏障或存储区域一样，和用于选择性地将电压施加到时钟线，用于一个或两个垂直移位的交替的行的结构 电极注册。