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    DATA MEMORY SYSTEM HAVING MESSAGE NETWORK PROVIDED WITH PLURAL DIRECTORS ON SEPARATED DATA TRANSFER PART AND COMMON CIRCUIT BOARD
    1.
    发明专利
    DATA MEMORY SYSTEM HAVING MESSAGE NETWORK PROVIDED WITH PLURAL DIRECTORS ON SEPARATED DATA TRANSFER PART AND COMMON CIRCUIT BOARD 失效

    公开(公告)号：JP2001331385A

    公开(公告)日：2001-11-30

    申请号：JP2001099693

    申请日：2001-03-30

    Applicant: EMC CORP

    Inventor： MACARTHUR STEPHEN D

    IPC: G06F13/10 ,  G06F3/06 ,  G06F12/08 ,  G06F12/16 ,  G06F13/00 ,  G06F13/14

    Abstract: PROBLEM TO BE SOLVED: To provide a data memory system, having a redundant configuration for protecting an entire system from a fault, in the case of the fault in a component. SOLUTION: This system is provided with a data transfer part, having a cache memory together with a system interface having plural first and second directors and a crossbar switch, having an input/output port coupled to such first and second directors higher than first and second director boards and a pair of output/input ports. The cache memory is coupled to the plural first and second directors. A message network is provided, and such a network is operated independently of the data transfer part. Data pass through the cache memory inside the data transfer part.

    Data Storage System
    2.
    发明专利
    Data Storage System 未知

    公开(公告)号：GB2366049B

    公开(公告)日：2004-10-27

    申请号：GB0108075

    申请日：2001-03-30

    Applicant: EMC CORP

    Inventor： MACARTHUR STEPHEN D

    IPC: G06F13/10 ,  G06F3/06 ,  G06F12/08 ,  G06F12/16 ,  G06F13/00 ,  G06F13/14

    Abstract: A system interface having a plurality of first directors and a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports. A plurality of second director boards is provided. Each one of the second directors boards has a plurality of second directors a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports. A data transfer section is provided having a cache memory. The cache memory is coupled to the plurality of first and second directors. A message network is provided, such network being operative independently of the data transfer section. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the message network to facilitate data transfer between first directors and the second directors. The data passes through the cache memory in the data transfer section. Each one of the directors includes a data pipe coupled between an input of such one of the first directors and the cache memory; a microprocessor. A controller is coupled to the microprocessor and the data pipe for controlling the transfer of the messages between the message network and such one of the first directors and for controlling the data between the input of such one of the first directors and the cache memory.

    Data storage system
    4.
    发明专利
    Data storage system 未知

    公开(公告)号：GB2366424B

    公开(公告)日：2004-11-10

    申请号：GB0108066

    申请日：2001-03-30

    Applicant: EMC CORP

    Inventor： OFEK YUVAL ,  BLACK DAVID L ,  MACARTHUR STEPHEN D ,  WHEELER RICHARD ,  THIBAULT ROBERT

    IPC: G06F13/00 ,  G06F3/06 ,  G06F11/20 ,  G06F12/08 ,  G06F13/36

    Abstract: A system interface includes a plurality of first director boards. Each one of the first director boards has a plurality of first directors and a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports. The system interface also includes a plurality of second director boards. Each one of the second directors boards has a plurality of second directors and a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports. A data transfer section is provided having a cache memory. The cache memory is coupled to the plurality of first and second directors. A message network is operative independently of the data transfer section. The message network includes a pair of message network boards. Each one of such message network boards has a switching network having a plurality input/output ports. Each one of such pair of input/output ports is coupled to a corresponding one of the pair of output/input ports of the crossbar switches of the plurality of first director boards and the plurality of second director boards. The first and second directors control data transfer between the first directors and the second directors in response to messages passing between the first directors and the second directors through the message network to facilitate data transfer between first directors and the second directors. Data passes through the cache memory in the data transfer section. Each one of the directors includes: a data pipe coupled between an input of such one of the second directors and the cache memory; a microprocessor. A controller is coupled to the microprocessor and the data pipe for controlling the transfer of the messages between the message network and such one of the second directors and for controlling the data between the input of such one of the second directors and the cache memory.

    Data transfer via director boards and a cache
    5.
    发明专利
    Data transfer via director boards and a cache 未知

    公开(公告)号：GB2366424A

    公开(公告)日：2002-03-06

    申请号：GB0108066

    申请日：2001-03-30

    Applicant: EMC CORP

    Inventor： OFEK YUVAL ,  BLACK DAVID L ,  MACARTHUR STEPHEN D ,  WHEELER RICHARD ,  THIBAULT ROBERT

    IPC: G06F13/00 ,  G06F3/06 ,  G06F11/20 ,  G06F12/08 ,  G06F13/36

    Abstract: A system interface includes a plurality of first directors 180 and a plurality of second directors 200 divided amongst a plurality of first and second director boards 190, 210, each having a crossbar switch 320 coupling the directors input/output ports on one of a pair of message network boards, the interface further including a data transfer section and a message network. The data transfer section includes a cache memory 320' which is coupled to the directors 180, 200. The messaging network operates independently of the data transfer section and is also coupled to the first and second director boards 190, 210. Data transfer between the first directors and the second directors is controlled in response to messages passing between them through the messaging network 260 and the data passes though the cache memory 320' in the data transfer section. The first and second directors may be coupled respectively to computer/server 120 and a bank of disc drives 141.

    Data storage system having separate data transfer section and message network with plural directors on common printed circuit board
    6.
    发明专利
    Data storage system having separate data transfer section and message network with plural directors on common printed circuit board 审中-公开
    具有独立数据传输部分的数据存储系统和信息网络与普通打印电路板上的多个主管

    公开(公告)号：JP2006190327A

    公开(公告)日：2006-07-20

    申请号：JP2006061963

    申请日：2006-03-08

    Applicant: Emc Corp ,  イーエムシー コーポレイションEmc Corporation

    Inventor： MACARTHUR STEPHEN D

    IPC: G06F13/00 ,  G06F13/10 ,  G06F3/06 ,  G06F12/08 ,  G06F12/16 ,  G06F13/14

    CPC classification number: G06F12/0873 ,  G06F3/0601 ,  G06F12/084 ,  G06F2003/0692 ,  G06F2212/261 ,  G06F2212/281

    Abstract: PROBLEM TO BE SOLVED: To provide a data storage system having redundancy arrangements to protect against total system failure in the event of a failure in a component. SOLUTION: A system interface has a plurality of first directors and a crossbar switch having input/output ports coupled to the first directors on such one of the first director boards and a pair of output/input ports. A plurality of second director boards are provided. Each one of the second director boards has a plurality of second directors and a crossbar switch having input/output ports coupled to the second directors on such one of the second director boards and a pair of output/input ports. A data transfer section is provided having a cache memory. The cache memory is coupled to the plurality of first and second directors. A message network is provided and such network is operated independently of the data transfer section. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：提供具有冗余配置的数据存储系统，以在组件发生故障的情况下防止整个系统故障。 解决方案：系统接口具有多个第一导向器和交叉开关，其具有耦合到第一导向板上的第一导向板上的第一引导件和一对输出/输入端口的输入/输出端口。 提供多个第二导向板。 第二导向板中的每一个具有多个第二导向器和具有连接到第二导向板上的第二导向器上的输入/输出端口和一对输出/输入端口的交叉开关。 提供具有高速缓冲存储器的数据传送部分。 高速缓冲存储器耦合到多个第一和第二引导器。 提供消息网络，并且这种网络独立于数据传送部分来操作。 版权所有（C）2006，JPO＆NCIPI

    DATA STORAGE SYSTEM HAVING SEPARATE DATA TRANSFER PART AND MESSAGE NETWORK
    8.
    发明专利
    DATA STORAGE SYSTEM HAVING SEPARATE DATA TRANSFER PART AND MESSAGE NETWORK 失效

    公开(公告)号：JP2001325158A

    公开(公告)日：2001-11-22

    申请号：JP2001099611

    申请日：2001-03-30

    Applicant: EMC CORP

    Inventor： OFEK YUVAL ,  BLACK DAVID L ,  MACARTHUR STEPHEN D ,  WHEELER RICHARD ,  THIBAULT ROBERT

    IPC: G06F3/06 ,  G06F11/20 ,  G06F12/08 ,  G06F13/00 ,  G06F13/10

    Abstract: PROBLEM TO BE SOLVED: To provide a data storage system having redundant structure to protect the entire system from a fault in the case of the fault of components. SOLUTION: A system interface includes plural first directors, plural second directors, a data transfer part and a message network. The data transfer part includes a cache memory. The cache memory is coupled with the plural first and second directors. The message network is operated independently of the data transfer part and coupled with the plural first and second directors. The first and second directors control data transfer among the first and second directors in response to a message to pass the first and second directors through the message network and facilitate the data transfer among the first and second directors. The data passes the cache memory in the data transfer part.

    Data transfer via a cache under control of an independent message network
    9.
    发明专利
    Data transfer via a cache under control of an independent message network 未知

    公开(公告)号：GB2366425A

    公开(公告)日：2002-03-06

    申请号：GB0108069

    申请日：2001-03-30

    Applicant: EMC CORP

    Inventor： OFEK YUVAL ,  BLACK DAVID L ,  MACARTHUR STEPHEN D ,  WHEELER RICHARD ,  THIBAULT ROBERT

    IPC: G06F3/06 ,  G06F11/20 ,  G06F12/08 ,  G06F13/00 ,  G06F13/10 ,  G06F13/36

    Abstract: A system interface includes a plurality of first directors 180, a plurality of second directors 200, a data transfer section 240 and a message network 260. The data transfer section includes a cache memory 220 which is coupled to the directors 180, 200. The messaging network 260 operates independently of the data transfer section and is also coupled to the first and second directors 180, 200. Data transfer between the first directors and the second directors is controlled in response to messages passing between the first directors and the second directors through the messaging network 260 and the data passes through the cache memory 220 in the data transfer section. The first and second directors may be coupled respectively to computer/server 120 and a bank of disc drives 140.

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