Charge transfer device having an influx portion for clock frequencies from 100 MHz

    公开(公告)号:US20240339529A1

    公开(公告)日:2024-10-10

    申请号:US18293656

    申请日:2022-07-29

    CPC classification number: H01L29/7685 H01L29/76808

    Abstract: A charge transfer device having a charge transfer channel in a semiconductor substrate. The charge transfer channel is formed by overlap of the possible electrostatic effect of the gates with the conduction layer. A clock generator has a clock frequency of more than 100 MHz which applies changes in potential at the clock frequency to the gates, for transporting charge carriers at the clock frequency from adjacent regions of the overlap between adjacent gates and the conduction layer. The charge transfer channel has an influx region which, in the flow direction, is arranged at a lateral outer boundary of the charge transfer channel and which at least partly extends over the regions of exactly two adjacent gates of the charge transfer channel in order to supply charge carriers to the charge transfer channel from a region outside the charge transfer channel that adjoins the influx region from a second charge transfer channel.

    Charge transfer device having a bulged portion for clock frequencies from 100 MHz

    公开(公告)号:US20250119137A1

    公开(公告)日:2025-04-10

    申请号:US18293631

    申请日:2022-07-29

    Abstract: A charge transfer device having a charge transfer channel in a semiconductor substrate. The charge transfer channel is formed by overlap of the possible electrostatic effect of the gates with the conduction layer. A clock generator has a clock frequency of more than 100 MHz which applies changes in potential at the clock frequency to the gates, for transporting charge carriers at the clock frequency from adjacent regions of the overlap between adjacent gates and the conduction layer. The charge transfer channel in the region of one gate has a region of a constriction in which the cross-section in the flow direction decreases, and is arranged at least in the region of the gate upstream of the region of the protuberance or in the regions of the gate upstream of the protuberance and the adjoining gate of the protuberance.

    CHARGE TRANSFER DEVICE HAVING A TAPER AT THE GATE FOR CLOCK FREQUENCIES FROM 100 MHz

    公开(公告)号:US20240339528A1

    公开(公告)日:2024-10-10

    申请号:US18293650

    申请日:2022-07-29

    CPC classification number: H01L29/7685 H01L29/76808

    Abstract: A charge transfer device having a charge transfer channel in a semiconductor substrate. A doped conduction layer is provided for movably accepting the charge carriers, and a sequence of at least two electrically isolated gates which adjacently succeed one another for transferring the charge carriers in the conduction layer in a flow direction is provided. The charge transfer channel is formed by overlap of the possible electrostatic effect of the gates with the conduction layer. A clock generator has a clock frequency of more than 100 MHz which applies changes in potential at the clock frequency to the gates, for transporting charge carriers at the clock frequency from adjacent regions of the overlap between adjacent gates and the conduction layer. The charge transfer channel in the region of one gate has a region of a constriction in which the cross-section in the flow direction decreases, and has a region with a constant or widened cross-section.

Patent Agency Ranking