公开(公告)号：US20140202627A1

公开(公告)日：2014-07-24

申请号：US14220060

申请日：2014-03-19

Applicant: Epistar Corporation

Inventor： Chen-Ke HSU ,  Liang Sheng CHI ,  Chun-Chang CHEN ,  Win-Jim SU ,  Hsu-Cheng LIN ,  Mei-Ling TSAI ,  Yi Lung LIU ,  Chen OU

IPC: H01L21/67 ,  H01L21/66

CPC classification number: H01L22/20 ,  H01L21/67005 ,  H01L21/67132 ,  H01L21/67271 ,  Y10S156/93 ,  Y10S156/941 ,  Y10T156/1111 ,  Y10T156/1116 ,  Y10T156/1158 ,  Y10T156/1168 ,  Y10T156/1179 ,  Y10T156/1195 ,  Y10T156/1917 ,  Y10T156/1933 ,  Y10T156/1983

Abstract: A method of chip sorting comprises providing a chip holder having a first surface; providing multiple chips on the first surface; providing a chip receiver having a second surface, wherein the second surface faces the first surface; attaching the multiple chips to the second surface; decreasing an adhesion between the multiple chips and the first surface; and separating the multiple chips from the first surface after the step of decreasing the adhesion between the multiple chips and the first surface.

Abstract translation: 一种芯片分选方法包括：提供具有第一表面的芯片保持器; 在第一表面上提供多个芯片; 提供具有第二表面的芯片接收器，其中所述第二表面面向所述第一表面; 将多个芯片附接到第二表面; 降低多个芯片和第一表面之间的粘合力; 以及在减少所述多个芯片与所述第一表面之间的粘合力的步骤之后，从所述第一表面分离所述多个芯片。

公开(公告)号：US20160300822A1

公开(公告)日：2016-10-13

申请号：US15187231

申请日：2016-06-20

Applicant: EPISTAR CORPORATION

Inventor： Hsu-Cheng LIN ,  Pei-Shan FANG ,  Ching-Yi CHIU ,  Chun-Chang CHEN

IPC: H01L25/075 ,  H01L21/683 ,  H01L23/544 ,  H01L33/54

CPC classification number: H01L25/0753 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/82 ,  H01L22/22 ,  H01L23/544 ,  H01L27/14 ,  H01L27/15 ,  H01L31/048 ,  H01L31/1876 ,  H01L33/0054 ,  H01L33/54 ,  H01L2221/6834 ,  H01L2221/68354 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2924/00

Abstract: An aggregation of semiconductor devices comprises a first layer, a second layer adhered to the first layer, and a plurality of semiconductor devices arranged between the first layer and the second layer to form a shape, wherein the shape comprises a curve and a mark, and the first layer is flexible.

Abstract translation: 半导体器件的集合包括第一层，粘附到第一层的第二层和布置在第一层和第二层之间的多个半导体器件以形成形状，其中形状包括曲线和标记，以及 第一层是灵活的。

公开(公告)号：US20150194581A1

公开(公告)日：2015-07-09

申请号：US14663439

申请日：2015-03-19

Applicant: EPISTAR CORPORATION

Inventor： Hsu-Cheng LIN ,  Ching-Yi CHIU ,  Pei-Shan FANG ,  Chun-Chang CHEN

IPC: H01L33/54 ,  H01L23/544 ,  H01L25/075 ,  H01L33/00 ,  H01L31/048 ,  H01L21/66 ,  H01L31/18

CPC classification number: H01L25/0753 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/82 ,  H01L22/22 ,  H01L23/544 ,  H01L27/14 ,  H01L27/15 ,  H01L31/048 ,  H01L31/1876 ,  H01L33/0054 ,  H01L33/54 ,  H01L2221/6834 ,  H01L2221/68354 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2924/00

Abstract: A method of manufacturing an aggregation of semiconductor devices comprising the steps of providing a first layer; sequentially addressing and adhering a plurality of semiconductor devices to the first layer to form a shape having a curve; providing a second layer; and adhering the second layer to the first layer.

Abstract translation: 一种制造半导体器件聚集的方法，包括以下步骤：提供第一层; 顺序地将多个半导体器件寻址并粘附到第一层以形成具有曲线的形状; 提供第二层; 并将第二层粘附到第一层。

公开(公告)号：US20140027790A1

公开(公告)日：2014-01-30

申请号：US13910581

申请日：2013-06-05

Applicant: EPISTAR CORPORATION

Inventor： Hsu-Cheng LIN ,  Ching-Yi CHIU ,  Pei-Shan FANG ,  Chun-Chang CHEN

IPC: H01L21/82 ,  H01L27/14 ,  H01L27/15

CPC classification number: H01L25/0753 ,  H01L21/6835 ,  H01L21/6836 ,  H01L21/82 ,  H01L22/22 ,  H01L23/544 ,  H01L27/14 ,  H01L27/15 ,  H01L31/048 ,  H01L31/1876 ,  H01L33/0054 ,  H01L33/54 ,  H01L2221/6834 ,  H01L2221/68354 ,  H01L2223/54413 ,  H01L2223/54433 ,  H01L2924/0002 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2924/00

Abstract: An aggregation of semiconductor devices, comprising: a first layer comprising a first surface and a second surface; a second layer comprising a first region and a second region; and a plurality of semiconductor devices disposed between the first layer and the second region wherein a shape of the second region comprises a curve and a mark.

Abstract translation: 半导体器件的集合，包括：包括第一表面和第二表面的第一层; 第二层，包括第一区域和第二区域; 以及设置在所述第一层和所述第二区域之间的多个半导体器件，其中所述第二区域的形状包括曲线和标记。