公开(公告)号：JP2001189421A

公开(公告)日：2001-07-10

申请号：JP2000353537

申请日：2000-11-20

Applicant: FRANCE TELECOM

Inventor： DELPECH PHILIPPE ,  ARNAL VINCENT

IPC: H01L27/04 ,  H01L21/02 ,  H01L21/822 ,  H01L29/92

Abstract: PROBLEM TO BE SOLVED: To solve a problem, in which a capacitor equipped with a metal electrode is subjected to a high-temperature annealing process, in an integrated circuit manufacturing process to be lacked in voltage linearity. SOLUTION: An integrated capacitor is equipped with a first electrode 1, a second electrode 3 which are both formed of metal layer, and dielectrics 2. The dielectrics 2 are composed of at least two dielectric layers 2-2 and 2-1, whose dielectric constants ε are varied in opposite directions corresponding to an electric field, and the thickness ratio of layer 2-2 to layer 2-1 is so determined as to enable the capacitor to have a sufficient voltage linearity which does not exceed 20×10-6/V.