公开(公告)号：US09363167B2

公开(公告)日：2016-06-07

申请号：US14322666

申请日：2014-07-02

Applicant: Force10 Networks, Inc.

Inventor： Janardhanan Pathangi Narasimhan

IPC: H04L12/28 ,  H04L12/709 ,  H04L12/935 ,  H04L12/931

CPC classification number: H04L45/245 ,  H04L47/125 ,  H04L49/30 ,  H04L49/35 ,  H04L49/354 ,  Y02D50/30

Abstract: A network switch suitable for receiving packets of information from and the packets of information to a communications network includes a plurality of physical ports, packet processing functionality and memory. The packet processing functionality operates on information stored in memory to determine the LAG, from among two or more LAGs, over which a packet received by the switch should be correctly forwarded. The switch memory stores a plurality of LAG tables, each one of which can include one or more entries comprising a physical port number and a packet parameter that are used by the packet processing functionality to determinately identify the correct LAG over which to forward a packet.

Abstract translation: 适合于从通信网络接收信息包和信息包的网络交换机包括多个物理端口，分组处理功能和存储器。 分组处理功能对存储在存储器中的信息进行操作以确定来自两个或更多个LAG中的LAG，由交换机接收到的分组应在其上正确转发。 交换机存储器存储多个LAG表，每个LAG表可以包括一个或多个条目，该条目包括物理端口号和分组参数，该分组参数由分组处理功能用来确定地识别正确的转发分组的LAG。