SIGMA-DELTA BASED PHASE LOCK LOOP

    公开(公告)号:CA2582345C

    公开(公告)日:2013-11-05

    申请号:CA2582345

    申请日:2005-09-21

    Abstract: A sigma-delta based phase lock loop device is provided that includes a phase frequency detector (PFD), a charge pump and a voltage controlled oscillator. The PDF to receive a reference signal and a feedback signal and to output signals based on a comparison of the reference signal and the feedback signal. The charge pump to output a charge based on the output signals from the PFD. The charge pump including a first current source to apply a fixed amount of current and a second current source to apply a variable amount of current. The voltage controlled oscillator to output a clock signal based on the received charge from the charge pump.

    3.
    发明专利
    未知

    公开(公告)号:DE60234580D1

    公开(公告)日:2010-01-14

    申请号:DE60234580

    申请日:2002-03-27

    Abstract: A wireless or wired communication system and method is provided including a transmitter and a receiver. A RF communication system in accordance with the present invention includes an apparatus and gain control method between RF receiver and baseband modem in case of a plurality of gain stages inside a receiver. The gain of each stage can be controlled by an integrated gain controller. The gain controller monitors the signal level of each gain stage to place its gain to optimal value. The gain control apparatus and method can be implemented in a digital AGC system. The gain controller accepts a signal implementing gain control and thus there is no stability issue. When distributed gain stages are present inside a related art receiver and separate gain control loops are used, stability issues can arise. In a preferred embodiment of an apparatus and method, the baseband modem decides the amount of gain control and adjusts the gain of certain gain stages by the proper amount.

    COMMUNICATION TRANSMITTER USING OFFSET PHASE-LOCKED-LOOP

    公开(公告)号:HK1082351A1

    公开(公告)日:2006-06-02

    申请号:HK06104363

    申请日:2006-04-11

    Abstract: A translational-loop transmitter generates RF signals using at most one phase-locked-loop (PLL) circuit. In one embodiment, a single PLL generates two local oscillation signals. The first oscillation signal is mixed with a baseband signal to generate an intermediate frequency signal. The second oscillation signal is input into the translational loop to adjust a voltage-controlled oscillator to the desired carrier frequency. In order to perform this type of modulation, the frequencies of the local oscillation signals are set so that they are harmonically related to one another relative to the carrier frequency. Other embodiments generate only one oscillation signal. Under these conditions, the intermediate frequency signal is generated using the oscillation signal, and a frequency divider in the translational loop is used to generate a control signal for adjusting the voltage-controlled oscillator to the carrier frequency. In still other embodiments, a transmitter signal is generated without using any phase-locked-loop circuits. This is accomplished by generating an intermediate frequency signal using a crystal oscillator, and then using a frequency divider in a feedback loop to generate a control signal for adjusting the voltage-controlled oscillator to the carrier frequency. By minimizing the number of phase-locked-loop circuits in the transmitter, the size, cost, and power requirements of mobile handsets may be significantly reduced.

    AUTOMATIC GAIN CONTROL METHOD FOR HIGHLY INTEGRATED COMMUNICATION RECEIVER

    公开(公告)号:CA2442515A1

    公开(公告)日:2002-10-10

    申请号:CA2442515

    申请日:2002-03-27

    Abstract: A wireless or wired communication system and method is provided including a transmitter and a receiver. A RF communication system in accordance with the present invention includes an apparatus and gain control method between RF receiver (803) and baseband modem (804) in case of a plurality of gain stages (830, 846, 862) inside a receiver (803). The gain of each stage (830, 846, 862) can be controlled by an integrated gain controller (828). The gain controller (828) monitors the signal level of each gain stage (830, 846, 862) to place its gain to optimal value. The gain control apparatus and method can be implemented in a digital AGC system. The gain controller (828) accepts a signal (826) implementing gain control and thus there is no stability issue. When distributed gain stages are present inside a related art receiver and separate gain control loops are used, stability issues can arise.

    VARIABLE GAIN LOW-NOISE AMPLIFIER FOR A WIRELESS TERMINAL

    公开(公告)号:CA2442332A1

    公开(公告)日:2002-10-10

    申请号:CA2442332

    申请日:2002-03-28

    Abstract: A variable gain, low noise amplifier is described, which is suitable as the input amplifier for a wireless terminal, or as the pre-amplifier stage of a wireless terminal transmitter. The amplifier (MN1) may achieve variable gain by deploying a network of transistors (MP1-MPn) in a parallel array, each independently selectable by a PMOS switch (220), and providing the variable resistance for the resonant circuit (Rp, Lp). Power dissipation can also be mitigated by using a network of driving transistors, each independently selectable by a PMOS switch (220). The resonant frequency of the amplifier may be made tunable by providing a selection of optional pull-up capacitors (Cp'1- Cp'n).

    AN ADAPTIVE LINEARIZATION TECHNIQUE FOR COMMUNICATION BUILDING BLOCK

    公开(公告)号:CA2458877C

    公开(公告)日:2011-01-25

    申请号:CA2458877

    申请日:2002-08-29

    Abstract: The present invention is directed to a linearization apparatus and method. Preferred embodiments according to the present invention can combine an auxiliary non-linear block (300) to a functional block of a system to increase linearity of an output signal (520) of the system such as a communication system. System overhead due to the non-linear auxiliary block can be small because of circuit structure, cost and low consumption. Further, the non-linear auxiliary block can be designed so that no feedback path is required. Further preferred embodiments can use a feedback path without loss of stability by using a cancellation apparatus or process based on an averaging detection of the output signal. For example, a feedback loop can detect power leakage in a sideband caused by non-linearities of the communication system.

    A TRANSCEIVER, A SYSTEM FOR OPERATING A TRANSCEIVER, A METHOD FOR FILTERING SIGNALS AND THE CONTROL METHOD

    公开(公告)号:HK1095677A1

    公开(公告)日:2007-05-11

    申请号:HK07102851

    申请日:2007-03-16

    Abstract: A system and method for filtering signals in a communications system reduces hardware and chip size requirements by selectively connecting a filter along transmitter and receiver paths of a transceiver. In operation, a controller generated signals for connecting the filter along the transmitter path when the transceiver is in transmitter mode and for connecting the filter along the receiver path when the transmitter is in receiver mode. The controller then generates additional signals for setting one or more parameters of the filter based on the path connected, or put differently based on the operational mode of the transceiver. In a variation, the controller sets the parameters of additional elements coupled to the filter as a way of further controlling processing of the transmitter and receiver signals. The system and method are particularly well suited to controlling the filtering of signals at the front-end of the transceiver having a direct-conversion architecture and in general ones performing time-multiplexing applications.

    APPARATUS AND METHOD OF OSCILLATING WIDEBAND FREQUENCY

    公开(公告)号:CA2580945A1

    公开(公告)日:2006-04-06

    申请号:CA2580945

    申请日:2005-09-21

    Abstract: An apparatus for oscillating a frequency, which comprises a phase lock loop, see fig. 5, a variable frequency divider() is shown, that divides a first frequency (Fout) signal by a division ratio to generate a second frequency signal, this based on a comparison of reference frequency clock input (Fref) and feedback input to phase/frequency detector (510). A charge pump (520) and loop filter (530) are shown with a divider (550) that divides the second frequency signal (355) to allow the correct feedback frequency to be realized. The VCO (540) inherently has a resonant circuit including the capacitors to be selected and a corresponding control voltage to set the frequency of operation as well as an active circuit (320) for proper gain.

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